ZXFV4089N8TC Diodes Zetex, ZXFV4089N8TC Datasheet - Page 7

• Manufacturer Part Number: ZXFV4089N8TC
• Description: IC AMP DC RESTORATION SO8
• Manufacturer: Diodes Zetex

Specifications of ZXFV4089N8TC

• Applications: DC Restoration
• Number Of Circuits: 1
• -3db Bandwidth: 210MHz
• Slew Rate: 400 V/µs
• Current - Supply: 8mA
• Current - Output / Channel: 40mA
• Voltage - Supply, Single/dual (±): ±4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Single Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (typ): ±5V
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC
• For Use With: ZXFV4583EV - BOARD EVAL FOR ZXFV4583/ZXFV4089
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ZXFV4089N8TCTR

ZXFV4089
ZXFV4089 detailed operating notes
Introduction
This device provides an uncommitted video feed-back amplifier together with a sample-hold
system to allow restoration or level-shifting of the input waveform to a controlled DC level.
The connection diagram, Figure 1 shows a typical video signal application. No output termination
is shown in the diagram, but if desired the output can drive a 75
cable via a 75
series
terminating resistor.
Amplifier configuration
The main amplifier uses current feedback in a non-inverting configuration. Two external resistors
are required to set the gain.
An external reference, V
, normally ground, is used to set the new DC level of the video signal.
REF
The input video signal is applied via an external input AC coupling capacitor, which is used to
store a DC control level when the sample-hold switch is open. Typically an external sampling
pulse (active low) is applied to the HOLD input. During this pulse, the sample-hold switch is
closed. This completes the DC feedback loop and the stored level is driven towards a new value.
At the end of the sampling pulse, the switch opens again and the DC level remains close to the
new established value until the next sample pulse. The sample-hold charging current is limited
to 300µA. Therefore the convergence towards the steady condition is typically slow, but after
several HOLD pulse cycles, the DC level settles closely to the Reference level at the V
input.
REF
The sample-hold loop contains the video amplifier within its path, and also includes an additional
sample-hold sense amplifier that compares V
with the output voltage using an internal low-
REF
pass filter. In the high state, the switch is open and the average DC level remains fixed apart from
a small drift due to the input bias current of the amplifier and switch leakage (see below).
DC restoration
The HOLD input is a TTL compatible signal that is buffered and controls the sample-hold switch.
A logic LOW state closes the switch and so enables the feedback control loop to set the output
level equal to V
(usually ground). The level of DC shift is maintained when the logic control
REF
returns to the HIGH state and the switch opens. In this way the whole waveform is conditionally
level shifted, or 'restored' to the new DC level. Figure 2 shows the response of the circuit to a
stationary or very slowly varying waveform with an initial voltage offset difference between V+
and V
, applied to the input coupling capacitor, when the HOLD input is cycled with a repetitive
REF
pulse waveform. When the HOLD input is at a logic LOW level, the signal input V+ is driven
towards V
. After a number of cycles, the waveform settles to the DC stabilised value. The
REF
waveform is unaffected during the logic HIGH interval of the HOLD input.
Figure 2 Response to slow input signal
Issue 4 - December 2008
7
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