MT8808/AP Winbond, MT8808/AP Datasheet

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MT8808/AP

Manufacturer Part Number
MT8808/AP
Description
SDRAM
Manufacturer
Winbond
Datasheet

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MT8808/AP
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ZARLINK
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Table of Contents-
1. GENERAL DESCRIPTION ..................................................................................................................3
2. FEATURES ..........................................................................................................................................3
3. AVAILABLE PART NUMBER...............................................................................................................3
4. PIN CONFIGURATION........................................................................................................................4
5. PIN DESCRIPTION..............................................................................................................................5
6. BLOCK DIAGRAM ...............................................................................................................................6
7. FUNCTIONAL DESCRIPTION ............................................................................................................7
8. TABLE OF OPERATING MODES .....................................................................................................12
9. SIMPLIFIED STATE DIAGRAM.........................................................................................................13
10. DC CHARACTERISTICS .................................................................................................................14
11. RECOMMENDED DC OPERATING CONDITIONS ........................................................................14
12. CAPACITANCE................................................................................................................................14
13. DC CHARACTERISTICS .................................................................................................................15
Power Up and Initialization................................................................................................................7
Programming Mode Register............................................................................................................7
Bank Activate Command ..................................................................................................................7
Read and Write Access Modes ........................................................................................................7
Burst Read Command ......................................................................................................................8
Burst Command................................................................................................................................8
Read Interrupted by a Read..............................................................................................................8
Read Interrupted by a Write..............................................................................................................8
Write Interrupted by a Write..............................................................................................................8
Write Interrupted by a Read..............................................................................................................8
Burst Stop Command .......................................................................................................................8
Addressing Sequence of Sequential Mode.......................................................................................9
Addressing Sequence of Interleave Mode ........................................................................................9
Auto-precharge Command .............................................................................................................10
Precharge Command......................................................................................................................10
Self Refresh Command ..................................................................................................................10
Power Down Mode..........................................................................................................................10
No Operation Command.................................................................................................................11
Deselect Command ........................................................................................................................11
Clock Suspend Mode......................................................................................................................11
Absolute Maximum Rating..............................................................................................................14
512K
- 1 -
4 BANKS
Publication Release Date: July 30, 2002
32 BITS SDRAM
W986432DH
Revision A5

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MT8808/AP Summary of contents

Page 1

Table of Contents- 1. GENERAL DESCRIPTION ..................................................................................................................3 2. FEATURES ..........................................................................................................................................3 3. AVAILABLE PART NUMBER...............................................................................................................3 4. PIN CONFIGURATION........................................................................................................................4 5. PIN DESCRIPTION..............................................................................................................................5 6. BLOCK DIAGRAM ...............................................................................................................................6 7. FUNCTIONAL DESCRIPTION ............................................................................................................7 Power Up and Initialization................................................................................................................7 Programming Mode Register............................................................................................................7 Bank Activate Command ..................................................................................................................7 Read ...

Page 2

AC CHARACTERISTICS .................................................................................................................16 15. TIMING WAVEFORMS....................................................................................................................19 Command Input Timing ..................................................................................................................19 .................................................................................................................20 Timing Waveforms, continued Read Timing ...................................................................................................................................20 .................................................................................................................21 Timing Waveforms, continued Control Timing of Input Data...........................................................................................................21 .................................................................................................................22 Timing Waveforms, continued Control Timing of Output Data ........................................................................................................22 .................................................................................................................23 Timing Waveforms, ...

Page 3

GENERAL DESCRIPTION W986432DH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words x 4 banks x 32 bits. Using pipelined architecture and 0.175 m process technology, W986432DH delivers a data bandwidth 800M ...

Page 4

PIN CONFIGURATION VCC DQ0 V CC DQ1 DQ2 V DQ3 DQ4 V CC DQ5 DQ6 VSSQ DQ7 VCC DQM0 CAS RAS A10/AP DQM2 DQ16 V DQ17 DQ18 V CC DQ19 DQ20 V DQ21 DQ22 V CC DQ23 1 2 ...

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PIN DESCRIPTION PIN NUMBER 24, 25, 26, 27, 60, 61, 62, 63, 64, 65 10, 11, 13, 31, 33, 34, 36, 37, 39, 40, 42, 45, 47, 48, 50, 51, 53, ...

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BLOCK DIAGRAM CLK CLOCK BUFFER CKE CONTROL CS SIGNAL GENERATOR RAS COMMAND CAS DECODER WE A10 MODE A0 REGISTER ADDRESS A9 BUFFER BS0 BS1 COLUMN REFRESH COUNTER COUNTER COLUMN DECODER CELL ARRAY BANK #0 SENSE AMPLIFIER DATA CONTROL CIRCUIT ...

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FUNCTIONAL DESCRIPTION Power Up and Initialization The default power up state of the mode register is unspecified. The following power up and initialization sequence need to be followed to guarantee the device being preconditioned to each user specific needs. ...

Page 8

Burst Read Command The Burst Read command is initiated by applying logic low level to RAS and WE high at the rising edge of the clock. The address inputs determine the starting column address for the burst. the burst length ...

Page 9

Addressing Sequence of Sequential Mode A column access is performed by increasing the address from the column address which is input to the device. The disturb address is varied by the Burst Length as shown in Table 1. Table 1. ...

Page 10

Auto-precharge Command If A10 is set to high when the Read or Write Command is issued, then the auto-precharge function is entered. During auto-precharge, a Read Command will execute as normal with the exception that the active bank will begin ...

Page 11

The Power Down mode is exited by bringing CKE high. When CKE goes high Operation Command is required on the next rising clock edge, depending on t enabled with CKE held high for a period equal to t ...

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TABLE OF OPERATING MODES Fully synchronous operations are performed to latch the commands at the positive edges of CLK. Table 3 shows the truth table for the operation commands. DEVICE COMMAND STATE Bank Active Idle Bank Precharge Any Precharge ...

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SIMPLIFIED STATE DIAGRAM Mode Register Set Write CKE WRITE SUSPEND CKE CKE WRITEA SUSPEND CKE POWER ON MRS = Mode Register Set REF = Refresh ACT = Active PRE = Precharge WRITEA = Write with Auto precharge READA = ...

Page 14

DC CHARACTERISTICS Absolute Maximum Rating PARAMETER Input, Column Output Voltage Power Supply Voltage Operating Temperature (-5/-6/-7/-7L) Operating Temperature(6I) Storage Temperature Soldering Temperature (10s) Power Dissipation Short Circuit Output Current Note: Exposure to conditions beyond those listed under Absolute Maximum ...

Page 15

DC CHARACTERISTICS (V = 3.3V 0.3V 0° 70°C for -5/-6/-7/-7L PARAMETER Operating Current t = min min Active precharge command cycling without burst operation Standby Current t = min ...

Page 16

AC CHARACTERISTICS (V = 3.3V 0.3V 0V for -5/-6/-7/-7L PARAMETER Ref/Active to Ref/Active Command Period Active to precharge Command Period Active to Read/Write Command Delay Time Read/Write(a) to ...

Page 17

Power up Sequence (1) Power up must be performed in the following sequence. (2) Power must be applied to V and V CC signals must be started at the same time. (3) After power-up a pause of at least ...

Page 18

A.C Latency Characteristics CKE to clock disable (CKE Latency) DQM to output to HI-Z (Read DQM Latency) DQM to output to HI-Z (Write DQM Latency) Write command to input data (Write Data Latency Command input ( CS ...

Page 19

TIMING WAVEFORMS Command Input Timing V IH CLK RAS CAS WE A0-A10 BS0 CKS CKH CKE t t CMS CMH t t CMS CMH t t CMS CMH t t CMS CMH t ...

Page 20

Timing Waveforms, continued Read Timing CLK CS RAS CAS WE A0-A10 BS0 Read Command Read CAS Latency Valid Data-Out - 20 - W986432DH Valid Data-Out Burst ...

Page 21

Timing Waveforms, continued Control Timing of Input Data (Word Mask) CLK t CMH DQM0 DQM1 Valid DQ0 -DQ7 Data- Valid DQ8-DQ15 Data- Valid DQ16 -DQ23 Data- ...

Page 22

Timing Waveforms, continued Control Timing of Output Data (Output Enable) CLK t CMH DQM0 DQM1 DQ0 -DQ7 DQ8 -DQ15 DQ16 -DQ23 DQ24 -DQ31 (Clock ...

Page 23

Timing Waveforms, continued Mode Register Set Cycle CLK t t CMS CMH CMS CMH RAS t t CMS CMH CAS t t CMS CMH A0-A10 Register set data BS0 Burst ...

Page 24

OPERATING TIMING EXAMPLE Interleaved Bank Read (Burst Length = 4, CAS Latency = CLK CS RAS t RAS CAS WE BS0 BS1 t RCD A10 RAa A0-A9 RAa CAw DQM CKE t AC ...

Page 25

Operating Timing Example, continued Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Autoprecharge CLK CS RAS t RAS CAS WE BS0 BS1 t RCD A10 RAa RBb A0-A9 RAa CAw RBb DQM CKE ...

Page 26

Operating Timing Example, continued Interleaved Bank Read (Burst Length = 8, CAS Latency = CLK CS RAS CAS WE BS0 BS1 t RCD A10 RAa A0-A9 RAa CAx DQM CKE DQ t RRD Read ...

Page 27

Operating Timing Example, continued Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Autoprecharge CLK CS RAS CAS WE BS0 BS1 t RCD A10 RAa A0-A9 CAx RAa DQM CKE ...

Page 28

Operating Timing Example, continued Interleaved Bank Write (Burst Length = CLK CS RAS CAS t RCD WE BS0 BS1 A10 RAa A0-A9 CAx RAa DQM CKE DQ ax0 ax1 t RRD Active Write Bank ...

Page 29

Operating Timing Example, continued Interleaved Bank Write (Burst Length = 8, Autoprecharge CLK CS RAS CAS WE BS0 BS1 t RCD A10 RAa CAx A0-A9 RAa DQM CKE DQ ax0 ax1 t RRD Active ...

Page 30

Operating Timing Example, continued Page Mode Read (Burst Length = 4, CAS Latency = CLK CS RAS CAS WE BS0 BS1 t t RCD RAa RBb A10 A0-A9 RAa RBb CAI DQM CKE ...

Page 31

Operating Timing Example, continued Page Mode Read/Write (Burst Length = 8, CAS Latency = CLK CS RAS CAS WE BS0 BS1 t RCD A10 RAa A0-A9 RAa CAx DQM CKE Bank ...

Page 32

Operating Timing Example, continued Autoprecharge Read (Burst Length = 4, CAS Latency = CLK CS RAS t RAS CAS WE BS0 BS1 t RCD A10 RAa A0-A9 RAa CAw DQM CKE t AC ...

Page 33

Operating Timing Example, continued Autoprecharge Write (Burst Length = CLK CS RAS t RAS CAS WE BS0 BS1 t RCD A10 RAa A0-A9 RAa CAw DQM CKE aw0 aw1 DQ Active Bank #0 ...

Page 34

Operating Timing Example, continued Autorefresh Cycle CLK RAS CAS WE BS0,1 A10 A0-A9 DQM CKE DQ All Banks Auto Prechage Refresh (CLK = 100 MHz ...

Page 35

Operating Timing Example, continued Self-refresh Cycle CLK RAS CAS WE BS0,1 A10 A0-A9 DQM t SB CKE t CKS DQ All Banks Self Refresh Precharge Entry (CLK = 100 MHz) 6 ...

Page 36

Operating Timing Example, continued Bust Read and Single Write (Burst Length = 4, CAS Latency = CLK CS RAS CAS t RCD WE BS0 BS1 A10 RBa A0-A9 RBa CBv DQM CKE DQ Read ...

Page 37

Operating Timing Example, continued Power-down Mode CLK CS RAS CAS WE BS A10 RAa A0-A9 RAa DQM t SB CKE t t CKS CKS DQ Active NOP Active Standby Power Down mode Note: The ...

Page 38

Operating Timing Example, continued Auto-precharge Timing (Write Cycle (1) CAS Latency = burst length = 1 Write AP Command burst length = 2 Write Command t WR ...

Page 39

Operating Timing Example, continued Auto-precharge Timing (Read Cycle (1) CAS Latency burst length = 1 Command Read burst length = 2 Read Command burst length = ...

Page 40

Operating Timing Example, continued Timing Chart of Read to Write Cycle In the case of Burst Length = 4 0 (1) CAS Latency Command DQM Command DQM DQ (2) CAS Latency ...

Page 41

Operating Timing Example, continued Timing Chart of Write to Read Cycle In the case of Burst Length = (1) CAS Latency = 2 Write ( a ) Command DQM Command Write DQM ...

Page 42

Operating Timing Example, continued Timing Chart of Burst Stop Cycle (Burst Stop Command (3) Read cycle ( a ) CAS latency =2 Read Command CAS latency = 3 Read Command DQ (2) Write cycle ...

Page 43

Operating Timing Example, continued Timing Chart of Burst Stop Cycle (Precharge Command) In the case of Burst Lenght = 8 0 (1) Read cycle ( a )CAS latency =2 Read Commad )CAS latency = 3 Read Commad ...

Page 44

Operating Timing Example, continued CKE/DQM Input Timing (Write Cycle) 1 CLK cycle No. External CLK Internal CKE DQM CLK cycle No. External CLK Internal CKE DQM CLK cycle No. External CLK Internal CKE DQM ...

Page 45

Operating Timing Example, continued CKE/DQM Input Timing (Read Cycle) 1 CLK cycle No. External CLK Internal CKE DQM CLK cycle No. External CLK Internal CKE DQM CLK cycle No. External CLK Internal CKE DQM ...

Page 46

Operating Timing Example, continued Self Refresh/Power Down Mode Exit Timing Asynchronous Control Input Buffer turn on time (Power down mode exit time) is specified < t (min CKS CLK CKE NOP Command ...

Page 47

PACKAGE DIMENSION 86L TSOP (II)-400 mil Controlling Dimension: Millimeters SYM SEATING PLANE DIMENSION DIMENSION (MM) (INCH) ...

Page 48

... Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 48 - W986432DH DESCRIPTION number Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 ...

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