LT1192CS8 Linear Technology, LT1192CS8 Datasheet - Page 9
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LT1192CS8
Manufacturer Part Number
LT1192CS8
Description
IC OP-AMP VIDEO HISPD SNGL 8SOIC
Manufacturer
Linear Technology
Datasheet
1.LT1192CN8.pdf
(12 pages)
Specifications of LT1192CS8
Applications
General Purpose
Number Of Circuits
1
Slew Rate
450 V/µs
Current - Supply
32mA
Current - Output / Channel
50mA
Voltage - Supply, Single/dual (±)
4.75 V ~ 16 V, ±2.38 V ~ 8 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LT1192CS8
Manufacturer:
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Quantity:
20 000
Part Number:
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Manufacturer:
LINEAR/凌特
Quantity:
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Part Number:
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Manufacturer:
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Quantity:
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APPLICATIO S I FOR ATIO
The ability to maintain shutoff is shown on the curve
Shutdown Supply Current vs Temperature in the Typical
Performance Characteristics section. At very high
elevated temperatures it is important to hold the SHDN pin
close to the negative supply to keep the supply current
from increasing.
Operating with Low Closed-Loop Gains
When using decompensated amplifiers it should be real-
ized that peaking in the frequency domain, and overshoot
and ringing in the time domain occur as closed-loop gain
is lowered. The LT1192 is stable to a closed-loop gain of
5, however, peaking and ringing can be minimized by
increasing the closed-loop gain. For instance, the LT1192
peaks 5dB when used in a gain of 5, but peaks by less than
0.5dB for a closed-loop gain of 10. Likewise, the overshoot
drops from 50% to 4% for gains of 10.
Murphy Circuits
There are several precautions the user should take when
using the LT1192 in order to realize its full capability.
Although the LT1192 can drive a 50pF load, isolating the
capacitance with 20 can be helpful. Precautions prima-
rily have to do with driving large capacitive loads.
V
SHDN
V
– 5V
OUT
0V
1MHz SINE WAVE GATED OFF WITH
SHUTDOWN PIN, A
U
Output Shutdown
U
V
= 10, R
W
L
= 1k
LT1192 • TA08
U
Other precautions include:
1. Use a ground plane (see Design Note 50, High Fre-
2. Do not use high source impedances. The input capaci-
3. PC board socket may reduce stability.
4. A feedback resistor of 1k or lower reduces the effects of
quency Amplifier Evaluation Board).
tance of 2pF, and R
8MHz – 3dB bandwidth.
stray capacitance at the inverting input.
Closed-Loop Voltage Gain vs Frequency
24
22
20
18
16
14
12
10
A
100k
V
= 10, SMALL-SIGNAL RISE TIME, WITH FET PROBES
Small-Signal Transient Response
A
V
= 5
1M
A
V
FREQUENCY (Hz)
S
= 10
= 10k for instance, will give an
10M
100M
LT1192 • TA10
1G
LT1192 • TA09
LT1192
9