SST39VF800-90-4C-EK Silicon Storage Technology, Inc, SST39VF800-90-4C-EK Datasheet

SST39VF800-90-4C-EK

Manufacturer Part Number

SST39VF800-90-4C-EK

Description

Manufacturer

Silicon Storage Technology, Inc

Datasheet

1.SST39VF800-90-4C-EK.pdf (23 pages)

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Company:

Bonase Electronics (HK) Co., Limited

Part Number:

SST39VF800-90-4C-EK

Manufacturer:

SST

Quantity:

5 184

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FEATURES:

• Organized as 512 K X 16

• Single 2.7-3.6V Read and Write Operations

• V

• Superior Reliability

• Low Power Consumption:

• Small Sector Erase Capability (256 sectors)

• Block Erase Capability (16 blocks)

• Fast Read Access Time:

PRODUCT DESCRIPTION

The SST39VF800Q/VF800 devices are 512K x 16

CMOS Multi-Purpose Flash (MPF) manufactured with

SST’s proprietary, high performance CMOS SuperFlash

technology. The split-gate cell design and thick oxide

tunneling injector attain better reliability and

manufacturability compared with alternate approaches.

The SST39VF800Q/VF800 write (Program or Erase)

with a 2.7-3.6V power supply. The SST39VF800Q/

VF800 conform to JEDEC standard pinouts for x16

memories.

Featuring high performance word program, the

SST39VF800Q/VF800 devices provide a typical word

program time of 14 µsec. The entire memory can typi-

cally be erased and programmed word-by-word in 8

seconds, when using interface features such as Toggle

Bit or Data# Polling to indicate the completion of Program

operation. To protect against inadvertent write, the

SST39VF800Q/VF800 have on-chip hardware and soft-

ware data protection schemes. Designed, manufac-

tured, and tested for a wide spectrum of applications, the

SST39VF800Q/VF800 are offered with a guaranteed

endurance of 10,000 cycles. Data retention is rated at

greater than 100 years.

The SST39VF800Q/VF800 devices are suited for appli-

cations that require convenient and economical updating

of program, configuration, or data memory. For all sys-

tem applications, the SST39VF800Q/VF800 signifi-

cantly improve performance and reliability, while lower-

ing power consumption. The SST39VF800Q/VF800 in-

343-04 2/99

- V

- Endurance: 100,000 Cycles (typical)

- Greater than 100 years Data Retention

- Active Current: 15 mA (typical)

- Standby Current: 3 µA (typical)

- Auto Low Power Mode: 3 µA (typical)

- Uniform 2 KWord sectors

- Uniform 32 KWord blocks

- 70 and 90 ns

for SST39VF800Q

DDQ

Power Supply to Support 5V I/O

not available on SST39VF800

8 Megabit (512K x 16-Bit) Multi-Purpose Flash

SST39VF800Q / SST39VF800

• Latched Address and Data

• Fast Sector Erase and Word Program:

• Automatic Write Timing

• End of Write Detection

• CMOS I/O Compatibility

• JEDEC Standard

• Packages Available

herently use less energy during Erase and Program than

alternative flash technologies. The total energy con-

sumed is a function of the applied voltage, current, and

time of application. Since for any given voltage range, the

SuperFlash technology uses less current to program and

has a shorter erase time, the total energy consumed

during any Erase or Program operation is less than

alternative flash technologies. The SST39VF800Q/

VF800 also improve flexibility while lowering the cost for

program, data, and configuration storage applications.

The SuperFlash technology provides fixed Erase and

Program times, independent of the number of Erase/

Program cycles that have occurred. Therefore the sys-

tem software or hardware does not have to be modified

or de-rated as is necessary with alternative flash tech-

nologies, whose erase and program times increase with

accumulated Erase/Program cycles.

To meet high density, surface mount requirements, the

SST39VF800Q/VF800 are offered in 48-pin TSOP and

48-pin TFBGA packages. See Figures 1 and 2 for

pinouts.

Device Operation

Commands are used to initiate the memory operation

functions of the device. Commands are written to the

device using standard microprocessor write sequences.

A command is written by asserting WE# low while

keeping CE# low. The address bus is latched on the

falling edge of WE# or CE#, whichever occurs last. The

data bus is latched on the rising edge of WE# or CE#,

whichever occurs first.

- Sector Erase Time: 18 ms (typical)

- Block Erase Time: 18 ms (typical)

- Chip Erase Time: 70 ms (typical)

- Word Program time: 14 µs (typical)

- Chip Rewrite Time: 8 seconds (typical)

- Internal V

- Toggle Bit

- Data# Polling

- Flash EEPROM Pinouts and command sets

- 48-Pin TSOP (12mm x 20mm)

- 6 x 8 Ball TFBGA

Generation

These specifications are subject to change without notice.

Advance Information

Related parts for SST39VF800-90-4C-EK

SST39VF800-90-4C-EK Summary of contents

Page 1

... The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST39VF800Q/VF800 write (Program or Erase) with a 2.7-3.6V power supply. The SST39VF800Q/ VF800 conform to JEDEC standard pinouts for x16 memories. Featuring high performance word program, the SST39VF800Q/VF800 devices provide a typical word program time of 14 µ ...

Page 2

... Data# Polling ( When the SST39VF800Q/VF800 are in the internal Pro- gram operation, any attempt to read DQ complement of the true data. Once the Program operation is completed, DQ will produce true data. The device is ...

Page 3

... V (2.7-3.6V 3.0V-only system should be tied to a 5.0V±10% (4.5-5.5V) power supply The mixed voltage system environment where flash memory RC has to be interfaced with 5V system chips. The V not offered on the SST39VF800, instead Connect pin ...

Page 4

... A9 A13 2 A8 A12 3 A14 4 A15 5 A16 343 ILL2.3 TFBGA BALL 4 8 Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information 8,388,608 bit EEPROM Cell Array Y-Decoder DDQ 343 ILL B1 Standard Pinout 40 39 Top View ...

Page 5

... To activate the device when CE# is low. To gate the data output buffers. To control the write operations. To provide 3-volt supply (2.7-3.6V) Supplies power for input/output buffers. It should be either tied to V (2.7 - 3.6V) for 3V I 5.0V (4.5 - 5.5V) power supply to support 5V I/O. (Not offered on SST39VF800 device, instead NC) Unconnected pins. OE# WE ...

Page 6

... Care” for Command sequence 15 8 Notes for Software ID Entry Command Sequence 1. With A -A =0; SST Manufacturer Code = 00BFH, is read with SST39VF800Q/VF800 Device Code = 2781H, is read with A 2. The device does not remain in Software Product ID Mode if powered down CFI ABLE UERY DENTIFICATION ...

Page 7

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information ABLE YSTEM NTERFACE NFORMATION Address Data Data 1BH 0027H V DQ7-DQ4: Volts, DQ3-DQ0: millivolts 1CH 0036H V DQ7-DQ4: Volts, DQ3-DQ0: millivolts 1DH 0000H V 1EH 0000H V 1FH 0004H Typical time out for Word Program 2 20H 0000H Typical time out for min ...

Page 8

... Surface Mount Lead Soldering Temperature (3 Seconds) ............................................................................... 240°C (1) ................................................................................................................................................................. Output Short Circuit Current (1) Note: Outputs shorted for no more than one second. No more than one output shorted at a time. (2) The absolute maximum stress ratings for SST39VF800 are referenced PERATING ANGE Range Ambient Temp Commercial 0 ° ...

Page 9

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information ABLE PERATING HARACTERISTICS Symbol Parameter I Power Supply Current DD Read Program and Erase I Standby V Current Auto Low Power Current ALP I Input Leakage Current LI I Output Leakage Current LO V Input Low Voltage IL V Input Low Voltage (CMOS) ...

Page 10

... AC CHARACTERISTICS T 12: SST39VF800Q/VF800 R ABLE Symbol Parameter T Read Cycle time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time OE (1) T CE# Low to Active Output CLZ (1) T OE# Low to Active Output OLZ (1) T CE# High to High-Z Output CHZ (1) T OE# High to High-Z Output ...

Page 11

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information ADDRESS A 18-0 CE# OE WE# HIGH IGURE EAD YCLE IMING IAGRAM 5555 ADDRESS OE# CE# DQ 15-0 XXAA SW0 IGURE ONTROLLED ROGRAM © 1999 Silicon Storage Technology, Inc ...

Page 12

... T CPH XX55 XXA0 DATA SW1 SW2 WORD (ADDR/DATA YCLE IMING IAGRAM OEH T OE DATA# IAGRAM 12 8 Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information INTERNAL PROGRAM OPERATION STARTS 343 ILL5.0 T OES DATA# DATA 343 ILL6.1 343-04 2/99 ...

Page 13

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information ADDRESS A 18-0 CE# OE# WE IGURE OGGLE IT IMING IAGRAM 5555 ADDRESS A 18-0 CE# OE WE# DQ 7-0 AA SW0 Note: The device also supports CE# controlled chip erase operation. The WE# and CE# signals are interchangeable as long as minimum timings are met. (See Table 13) ...

Page 14

... RASE IMING IAGRAM SIX-BYTE CODE FOR SECTOR ERASE 2AAA 5555 5555 2AAA SW1 SW2 SW3 SW4 RASE IMING IAGRAM 14 8 Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information SW5 343 ILL17 SW5 343 ILL18.0 343-04 2/99 ...

Page 15

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information THREE-BYTE SEQUENCE FOR SOFTWARE ID ENTRY ADDRESS A 14-0 5555 2AAA CE# OE WE# DQ 15-0 XXAA SW0 F 11 IGURE OFTWARE NTRY AND THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY ADDRESS A 14-0 5555 2AAA CE# OE WE# DQ 15-0 XXAA SW0 F 12: CFI Q ...

Page 16

... SOFTWARE ID EXIT AND RESET 5555 ADDRESS A 14-0 DQ 7-0 AA CE# OE WE# SW0 F 13 /CFI E IGURE OFTWARE XIT © 1999 Silicon Storage Technology, Inc. 2AAA 5555 IDA T WHP SW1 SW2 XIT 16 8 Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information 343 ILL10.0 343-04 2/99 ...

Page 17

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information V IHT INPUT V ILT AC test inputs are driven at V (2.4 V) for a logic “1” and V IHT inputs and outputs are V (2.0 V) and 14 IGURE NPUT UTPUT EFERENCE TO DUT F 15 IGURE EST ...

Page 18

... F 16 IGURE ORD ROGRAM LGORITHM © 1999 Silicon Storage Technology, Inc. 8 Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Start Write data: AA Address: 5555 Write data: 55 Address: 2AAA Write data: A0 Address: 5555 Load Word Address/Word Data Wait for end of Program ( Data# Polling ...

Page 19

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed F 17 IGURE AIT PTIONS © 1999 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read word Read same No word No Does DQ 6 match? ...

Page 20

... Write data: XX90 Write data: XXF0 Address: 5555 Address: 5555 Wait T IDA Wait T IDA Return to normal Read Software ID operation F OMMAND LOWCHARTS 20 8 Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information Command Sequence Write data: XXF0 Address: XX Wait T IDA Return to normal operation 343 ILL15.0 343-04 2/99 ...

Page 21

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information Chip Erase Command Sequence Write data: XXAA Address: 5555 Write data: XX55 Address: 2AAA Write data: XX80 Address: 5555 Write data: XXAA Address: 5555 Write data: XX55 Address: 2AAA Write data: XX10 Address: 5555 ...

Page 22

... SST39VF800Q-70-4I-EK SST39VF800Q-70-4I-BK SST39VF800Q-90-4I-EK SST39VF800Q-90-4I-BK SST39VF800 Valid combinations SST39VF800-70-4C-EK SST39VF800-70-4C-BK SST39VF800-90-4C-EK SST39VF800-90-4C-BK SST39VF800-70-4I-EK SST39VF800-70-4I-BK SST39VF800-90-4I-EK SST39VF800-90-4I-BK Example : Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. ...

Page 23

... Megabit Multi-Purpose Flash SST39VF800Q / SST39VF800 Advance Information PACKAGING DIAGRAMS 1.10 0.90 0.70 0.50 Note: 1. Complies with JEDEC publication 95 MO-142 DD dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in metric (min/max). 3. Coplanarity: 0.1 (±.05) mm. 48 EAD HIN MALL UTLINE ACKAGE SST ACKAGE ...

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