IC62LV25616LL-70TI INTEGRATED CIRCUIT SOLUTION, IC62LV25616LL-70TI Datasheet
IC62LV25616LL-70TI
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IC62LV25616LL-70TI Summary of contents
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... IC62LV25616L IC62LV25616LL Document Title 256Kx16 bit Low Voltage and Ultra Low Power CMOS Static RAM Revision History Revision No History 0A Initial Draft 0B 1. Change for t 2. Change for V 3.1 Change for I 3.2 Change for I 4. Change for I 5.1 Change for V 5.2 Change for I 0C 1.Change for I 2 ...
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... Output and Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IC62LV25616L and IC62LV25616LL are packaged in the JEDEC standare 44-pin TSOP-2 and 48-pin 6*8mm TF-BGA. A0-A17 DECODER ...
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... IC62LV25616L IC62LV25616LL PIN CONFIGURATIONS 44-Pin TSOP I/O0 7 I/O1 8 I/O2 9 I/O3 10 Vcc 11 GND 12 I/O4 13 I/O5 14 I/ A16 18 A15 19 A14 20 A13 21 A12 22 PIN DESCRIPTIONS A0-A17 Address Inputs I/O0-I/O15 Data Input/Output CE Chip Enable Input OE Output Enable Input WE Write Enable Input ...
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... IC62LV25616L IC62LV25616LL OPERATING RANGE Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM T Temperature Under Bias BIAS V Vcc related to GND CC T Storage Temperature STG P Power Dissipation T Notes: 1 ...
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... IC62LV25616L IC62LV25616LL AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input Reference Level Output Reference Level Output Load AC TEST LOADS OUTPUT 100 pF Including jig and scope Figure 1 IC62LV25616L POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions I Vcc Dynamic Operating ...
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... IC62LV25616L IC62LV25616LL IC62LV25616LL POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions I Vcc Dynamic Operating Supply Current I OUT I TTL Standby Current (TTL Inputs ≥ CMOS Standby ≥ V Current (CMOS Inputs ULB Control V CC ...
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... IC62LV25616L IC62LV25616LL AC TEST LOADS READ CYCLE NO.1 (1,2) (Address Controlled) ( ADDRESS D OUT PREVIOUS DATA VALID AC WAVEFORMS READ CYCLE NO. 2 (1,3) CE, OE, AND UB/LB Controlled ( ADDRESS LZB HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE, UB Address is valid prior to or coincident with CE LOW transitions. ...
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... IC62LV25616L IC62LV25616LL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA LB, UB Valid to End of Write t PWB WE Pulse Width t PWE t Data Setup to Write End ...
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... IC62LV25616L IC62LV25616LL WRITE CYCLE NO. 2 (WE Controlled) ADDRESS CE LOW UB DATA UNDEFINED OUT D IN WRITE CYCLE NO Controlled) ADDRESS CE LOW WE UB HZWE D OUT DATA UNDEFINED D IN Integrated Circuit Solution Inc. LPSR013-0D 10/11/2002 t WC VALID ADDRESS PWE t PBW ...
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... IC62LV25616L IC62LV25616LL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V Vcc for Data Retention DR I Data Retention Current DR t Data Retention Setup Time SDR t Recovery Time RDR DATA RETENTION WAVEFORM V CC 2.7V 2. CE, LB/UB GND 10 Test Condition See Data Retention Waveform Vcc = 1.5V, CE ≥ Vcc – 0.2V Com ...
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... IC62LV25616L-70TI TSOP-2 IC62LV25616L-70BI 6*8mm TF-BGA IC62LV25616L-100TI TSOP-2 IC62LV25616L-100BI 6*8mm TF-BGA Package IC62LV25616LL-55TI TSOP-2 IC62LV25616LL-55BI 6*8mm TF-BGA IC62LV25616LL-70TI TSOP-2 IC62LV25616LL-70BI 6*8mm TF-BGA IC62LV25616LL-100TI TSOP-2 IC62LV25616LL-100BI 6*8mm TF-BGA Integrated Circuit Solution Inc. HEADQUARTER: HSIN-CHU, TAIWAN, R.O.C. TEL: 886-3-5780333 Fax: 886-3-5783000 BRANCH OFFICE: ...