PC28F128J3D75 Numonyx/Intel, PC28F128J3D75 Datasheet

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Numonyx™ Embedded Flash Memory ( 32, 64, 128, and 256 Mbit (Monolithic) Product Features Architecture — Symmetrical 128-Kbyte blocks — 256 Mbit (256 blocks) — 128 Mbit (128 blocks) — 64 Mbit (64 blocks) — 32 Mbit (32 ...

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INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR Legal L ines and D isc laim er s OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Contents 1.0 Introduction .............................................................................................................. 6 1.1 Nomenclature ..................................................................................................... 6 1.2 Acronyms........................................................................................................... 6 1.3 Conventions ....................................................................................................... 7 2.0 Functional Overview .................................................................................................. 8 2.1 Block Diagram .................................................................................................. 10 2.2 Memory Map..................................................................................................... 11 3.0 Package ...

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Programming Operations ....................................................................................38 9.3.1 Single-Word/Byte Programming................................................................39 9.3.2 Buffered Programming ............................................................................39 9.4 Block Erase Operations .......................................................................................40 9.5 Suspend and Resume .........................................................................................41 9.6 Status Signal ....................................................................................................42 9.7 Security and Protection.......................................................................................43 9.7.1 Normal Block Locking ..............................................................................43 9.7.2 Configurable Block Locking.......................................................................44 9.7.3 OTP ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Revision History Date Revision Description February 2007 001 Initial release Revised the following graphics to support 256Mbit: • Figure 1, “Intel® Embedded Flash Memory ( Memory Block Diagram (32, 64 ...

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Introduction This document contains information pertaining to the Numonyx™ Embedded Flash Memory ( device features, operation, and specifications. The Numonyx™ Embedded Flash Memory J3 Version D ( provides improved mainstream performance with enhanced security features, ...

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Numonyx™ Embedded Flash Memory ( Monolithic) PR Protection Register PRD Protection Register Data RFU Reserved for Future Use SR Status Register SRD Status Register Data WSM Write State Machine ECR Enhanced Configuration Register 1.3 Conventions h: Hexadecimal Suffix ...

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Functional Overview The Numonyx™ Embedded Flash Memory ( family contains high-density memory organized in any of the following configurations: • 32 Mbytes or 16 Mwords (256-Mbit), organized as two-hundred-fifty-six 128-Kbyte erase blocks. • 16 Mbytes or 8 ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Memory Blocks are selectively and individually lockable in-system. Individual block locking uses block lock-bits to lock and unlock blocks. Block lock-bits gate block erase and program operations. Lock-bit configuration operations set and ...

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Block Diagram Figure 1: Memory Block Diagram, 32-, 64-, 128-, and 256-Mbit (monolithic) V CCQ 32-Mbit Y-Decoder 64-Mbit Input Buffer 128-Mbit ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 2.2 Memory Map Figure 2: Numonyx™ Embedded Flash Memory ( Monolithic) Memory Map A[24-0]: 256 Mbit A [23-0]:128 Mbit A [22-0]: 64 Mbit A [21-0]: 32 Mbit 1FFFFFF 128-Kbyte Block ...

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Package Information 3.1 56-Lead TSOP Package, 32-, 64-, 128-, and 256-Mbit Figure 3: 56-Lead TSOP Package Mechanical Z Pin 1 See Detail A Detail A Notes: 1. One dimple on package denotes Pin two dimples, then ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Table 1: 56-Lead TSOP Dimension Table Parameter Symbol Lead Count Lead Tip Angle Seating Plane Coplanarity Lead to Package Offset 3.2 Easy BGA Package, 32-, 64-, 128-, and 256-Mbit Figure 4: Easy ...

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Table 2: Easy BGA Package Dimensions Table (Sheet Parameter Package Body Width Package Body Length Pitch Ball (Lead) Count Seating Plane Coplanarity Corner to Ball A1 Distance Along D (32/64/128/ 256 Mb) Corner to Ball A1 Distance ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 4.0 Ballouts and Signal Descriptions Numonyx™ Embedded Flash Memory ( available in two package types. All densities of the Numonyx™ Embedded Flash Memory ( Monolithic) devices are ...

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TSOP Package Pinout, 32-, 64-,128-, 256-Mbit Figure 6: 56-Lead TSOP Package Pinout (32/64/128/256 Mbit ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Table 3: Signal Descriptions for Numonyx™ Embedded Flash Memory ( Monolithic) (Sheet Symbol Type HIGH-BYTE DATA BUS: Inputs data during x16 buffer writes and programming operations. Input/ ...

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Maximum Ratings and Operating Conditions 5.1 Absolute Maximum Ratings Warning: Stressing the device beyond the “Absolute Maximum Ratings” may cause permanent damage. These are stress ratings only. NOTICE: This document contains information available at the time of its release. ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Table 6: Power-Up/Down Sequence Power Supply Voltage V 1st CC(min) V 2nd CCQ(min) 2nd V 3rd PEN(min) † Power supplies connected or sequenced together. Device inputs must not be driven until all ...

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Electrical Characteristics 6.1 DC Current Specifications Table 7: DC Current Characteristics (Sheet CCQ V CC Symbol Parameter I Input and V Load Current LI PEN I Output Leakage Current LO 32, 64, 128, 256 I ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Table 7: DC Current Characteristics (Sheet CCQ V CC Symbol Parameter V Block Erase Clear Block Lock-Bits CCE Current V Program CC I Suspend or ...

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Table 8: DC Voltage Characteristics (Sheet CCQ V CC Symbol Parameter V during Block Erase, Program, PEN V PENH or Lock-Bit Operations V V Lockout Voltage LKO CC Notes: 1. Includes STS. 2. Sampled, not 100% ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 7.0 AC Characteristics Timing symbols used in the timing diagrams within this document conform to the following convention Figure 7: Timing Signal Naming Convention Source Signal Source State Figure 8: Timing Signal ...

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Table 10: Read Operations (Sheet Asynchronous Specifications V # Sym Parameter R2 t Address to Output Delay AVQV Output Delay X ELQV R4 t OE# to Non-Array Output Delay GLQV R5 t RP# ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Figure 9: Single Word Asynchronous Read Waveform Address [A] CEx [E] OE# [G] WE# [ Data [D/Q] R11 BYTE#[F] R5 RP# [P] Notes low is defined as the ...

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Figure 11: 8-Word Asynchronous Page Mode Read A[MAX:4] [A] A[3:1] [A] CEx [E] OE# [G] WE# [W] D[15:0] [Q] RP# [P] BYTE# Notes low is defined as the last edge of CE0, CE1, or CE2 that enables the ...

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Numonyx™ Embedded Flash Memory ( Monolithic) C Table 12: Write Operations # Symbol RP# High Recovery to WE# (CE PHWL PHEL (WE#) Low to WE# (CE ELWL WLEL X ...

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Figure 12: Asynchronous Write Waveform ADDRESS [A] CEx (WE#) [E (W)] WE# (CEx) [W (E)] OE# [G] DATA [D/Q] STS[R] W1 RP# [P] VPEN [V] Figure 13: Asynchronous Write to Read Waveform Address [A] CE# [E] WE# [W] OE# [G] ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 7.2 Program, Erase, Block-Lock Specifications Table 13: Configuration Performance # Symbol Write Buffer Byte Program Time W16 (Time to Program 32 bytes/16 words) Byte Program Time (Using Word/Byte Program Command) for 130nm ...

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Table 14: Reset Specifications # Symbol RP# Pulse Low Time P1 t PLPH (If RP# is tied to V RP# High to Reset during Block Erase, Program, or Lock-Bit P2 t PHRH Configuration Vcc Power Valid to RP# de-assertion (high) ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 8.0 Bus Interface This section provides an overview of Bus operations. Basically, there are three operations you can do with flash memory: Read, Program (Write), and Erase.The on- chip Write State Machine ...

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Bus Reads Reading from flash memory outputs stored information to the processor or chipset, and does not change any contents. Reading can be performed an unlimited number of times. Besides array data, other types of data such as device ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Note: For forward compatibility reasons, if the 8-word Asynchronous Page mode is used on Numonyx™ Embedded Flash Memory ( Monolithic Clear Status Register command must be executed after ...

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The CUI does not occupy an addressable memory location written when the device is enabled and WE# is active. The address and data needed to execute a command are latched on the rising edge of WE# or the ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Table 19: Command Bus Operations Command Program Enhanced Configuration Register Program OTP Register Clear Status Register Program STS Configuration Register Read Array Read Status Register Read Identifier Codes (Read Device Information) CFI ...

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Flash Operations This section describes the operational features of flash memory. Operations are command-based, wherein command codes are first issued to the device, then the device performs the desired operation. All command codes are issued to the device using ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 9.1.1 Clearing the Status Register The Status Register (SR) contain Status and error bits which are set by the device. SR status bits are cleared by the device, however SR error bits ...

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Note: Issuing the Read Array command to the device while it is actively programming or erasing causes subsequent reads from the device to output invalid data. Valid array data is output only after the program or erase operation has finished. ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 9.3.1 Single-Word/Byte Programming Array programming is performed by first issuing the Single-Word/Byte Program command. This is followed by writing the desired data at the desired array address. The read mode of the ...

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Note: After issuing the confirm command, write-buffer contents are programmed into the flash memory array. The Status Register indicates a busy status (SR during array programming.Issuing the Read Array command to the device while it is actively programming ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Standby power levels are not be realized until the block-erase operation has finished. Also, asserting RP# aborts the block-erase operation, and array contents at the addressed location are indeterminate. The addressed block ...

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Table 25: Valid Commands During Suspend (Sheet Device Command Lock Block Unlock Block Program OTP Register During Suspend, array-read operations are not allowed in blocks being erased or programmed. A block-erase under program-suspend is not allowed. However, ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Table 27: STS Configuration Coding Definitions D7 D6 D[1:0] = STS Configuration Codes 00 = default, level mode; device ready indication 01 = pulse on Erase Complete 10 = pulse on Program ...

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When the set lock-bit operation is complete, SR.4 should be checked for any error. When the clear lock-bit operation is complete, SR.5 should be checked for any error. Errors bits must be cleared using the Clear Status Register command. Block ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 9.7.6 Locking the OTP Protection Register The user-programmable segment of the PR is lockable by programming Bit 1 of the Protection Lock Register (PLR Bit 0 of this location is ...

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Table 30: Byte-Wide Protection Register Addressing Byte Use A8 LOCK Both 1 LOCK Both 1 0 Factory 1 1 Factory 1 2 Factory 1 3 Factory 1 4 Factory 1 5 Factory 1 6 Factory 1 7 Factory 1 8 ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 10.0 ID Codes Table 31: Read Identifier Codes Code Device Code December 2007 316577-06 Address 32-Mbit 00001h 64-Mbit 00001h 128-Mbit 00001h 256-Mbit 00001h Data 0016h 0017h 0018h 001Dh Datasheet 47 ...

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Device Command Codes For a complete definition on device operations refer to on page 34. The list of all applicable commands are included here one more time for the convenience. Table 32: Command Bus Operations for Command Program Enhanced ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 12.0 Flow Charts Figure 19: Write to Buffer Flowchart December 2007 316577-06 Start Setup - Write 0xE8 - Block Address Check Buffer Status - Perform read operation - Read Ready Status on ...

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Figure 20: Status Register Flowchart Command Cycle - Issue Status Register Command - Address = any dev ice address - Data = 0x70 - Read Status Register SR[7:0] - Set/Reset by WSM - Set by WSM - Reset by user ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Figure 21: Byte/Word Program Flowchart Start Write 40H, Address Write Data and Address Read Status Register 0 SR Full Status Check if Desired Byte/Word Program Complete FULL STATUS CHECK PROCEDURE ...

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Figure 22: Program Suspend/Resume Flowchart Start Write B0H Read Status Register SR SR Write FFH Read Data Array Done Reading Yes Write D0H Programming Resumed Datasheet 52 Numonyx™ Embedded Flash Memory ( Monolithic) Bus ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Figure 23: Block Erase Flowchart Start Issue Single Block Erase Command 20H, Block Address Write Confirm D0H Block Address Read Status Register 0 SR Full Status Check if Desired Erase ...

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Figure 24: Block Erase Suspend/Resume Flowchart Start Write B0H Read Status Register SR SR Read Read or Program? Read Array No Data Done? Yes Write D0H Block Erase Resumed Datasheet 54 Numonyx™ Embedded Flash Memory (J3 ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Figure 25: Set Block Lock-Bit Flowchart Start Write 60H, Block Address Write 01H, Block Address Read Status Register 0 SR Full Status Check if Desired Set Lock-Bit Complete FULL STATUS ...

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Figure 26: Clear Lock-Bit Flowchart Start Write 60H Write D0H Read Status Register 0 SR Full Status Check if Desired Clear Block Lock-Bits Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above) 1 SR.3 = Voltage ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Figure 27: Protection Register Programming Flowchart Start Write C0H (Protection Reg. Program Setup) Write Protect. Register Address/Data Read Status Register No SR Yes Full Status Check if Desired Program Complete ...

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Common Flash Interface The (CFI) specification outlines device and host system software interrogation handshake which allows specific vendor-specified software algorithms to be used for entire families of devices. This allows device independent, JEDEC ID-independent, and forward- and backward-compatible software ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Table 33: Summary of Query Structure Output as a Function of Device and Mode Device Query start location in Type/ maximum device bus Mode width addresses (1) x8 mode N/A Note: 1. ...

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Table 35: Query Structure Offset Sub-Section Name 27h Device Geometry Definition Primary Numonyx-Specific Extended (3) P Query Table Notes: 1. Refer to the Query Structure Output section and offset 28h for the detailed definition of offset address as a function ...

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Numonyx™ Embedded Flash Memory ( Monolithic) 13.5 System Interface Information The following device information can optimize system interface software. Table 38: System Interface Information Offset Length V logic supply minimum program/erase voltage CC 1Bh 1 bits 0–3 BCD ...

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Table 40: Device Geometry: Address Codes Address 32 Mbit 27: --16 28: --02 29: --00 2A: --05 2B: --00 2C: --01 2D: --1F 2E: --00 2F: --00 30: --02 13.7 Primary-Vendor Specific Extended Query Table Certain flash features and commands ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Table 41: Primary Vendor-Specific Extended Query (Sheet (1) Offset Length P = 31h (Optional Flash Features and Commands) Supported functions after suspend: read Array, Status, Query Other supported operations ...

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Table 43: Burst Read Information (1) Offset Length P = 31h Page Mode Read capability bits 0–7 = “n” such that 2 (P+13)h 1 page bytes. See offset 28h for device word width to determine page- mode data output width. ...

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Numonyx™ Embedded Flash Memory ( Monolithic) Appendix A Additional Information Order Number Numonyx™ StrataFlash™ Memory (J3); 28F256J3, 28F128J3, 28F640J3, 28F320J3 298130 Specification Update 298136 Numonyx™ Persistent Storage Manager (IPSM) User’s Guide Software Manual 297833 Numonyx™ Flash Data Integrator ...

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Appendix B Ordering Information Figure 28: Decoder for Discrete Family, 32-, 64-, 128-, 256-Mbit (monolithic Package TE = 56-Lead TSOP RC = 64-Ball Easy BGA ...