ADSP2101 Analog Devices, ADSP2101 Datasheet
ADSP2101
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ADSP2101 Summary of contents
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... RAM, a programmable timer, one or two serial ports, and, on the ADSP-2111, a host interface port. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use ...
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ADSP-21xx Fabricated in a high speed, submicron, double-layer metal CMOS process, the highest-performance ADSP-21xx proces- sors operate at 25 MHz with instruction cycle time. Every instruction can execute in a single cycle. Fabrication in CMOS results in ...
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Feature Data Memory (RAM) Program Memory (RAM) Timer Serial Port 0 (Multichannel) Serial Port 1 Host Interface Port Speed Grades (Instruction Cycle Time) 10.24 MHz (76.9 ns) 13.0 MHz (76.9 ns) 13.824 MHz (72.3 ns) 16.67 MHz (60 ns) 20.0 ...
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... For detailed design information on the architecture and instruction set, refer to the ADSP-2100 Family User’s Manual, available from Analog Devices. EZ-ICE and EZ-LAB are registered trademarks of Analog Devices, Inc. ARCHITECTURE OVERVIEW Figure 1 shows a block diagram of the ADSP-21xx architecture. The processors contain three independent computational units: the ALU, the multiplier/accumulator (MAC), and the shifter ...
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DATA DATA ADDRESS ADDRESS GENERATOR GENERATOR #1 #2 PMA BUS 14 DMA BUS 14 PMD BUS 24 DMD BUS 16 INPUT REGS INPUT REGS ALU MAC OUTPUT REGS OUTPUT REGS One bus grant execution mode (GO Mode) allows the ADSP- ...
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ADSP-21xx Flexible Framing—The SPORTs have independent framing for the transmit and receive functions; each function can run in a frameless mode or with frame synchronization signals inter- nally generated or externally generated; frame sync signals may be active high or ...
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The interrupt force and clear register, IFC write-only register that contains a force bit and a clear bit for each inter- rupt (except for level-sensitive interrupts and the ADSP-2111 HIP interrupts—these cannot be forced or cleared in software). ...
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ADSP-21xx A clock output signal (CLKOUT) is generated by the processor, synchronized to the processor’s internal cycles. Reset The RESET signal initiates a complete reset of the ADSP-21xx. The RESET signal must be asserted when the chip is powered up ...
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CLOCK or CRYSTAL SERIAL DEVICE (OPTIONAL) SERIAL DEVICE (OPTIONAL) THE TWO MSBs OF THE DATA BUS (D BOOT MEMORY EPROM ADDRESS. THIS IS ONLY REQUIRED FOR THE 27256 AND 27512. Figure 3. ADSP-2101/ADSP-2103/ADSP-2115 System 1x CLOCK or CRYSTAL SERIAL ...
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ADSP-21xx 1x CLOCK or CRYSTAL SERIAL DEVICE (OPTIONAL) SERIAL DEVICE (OPTIONAL) THE TWO MSBs OF THE DATA BUS (D BOOT MEMORY EPROM ADDRESS. THIS IS ONLY REQUIRED FOR THE 27256 AND 27512. The RESET input resets all internal stack pointers ...
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ADSP-2101/ADSP-2103/ADSP-2111 When MMAP = 0, on-chip program memory RAM occupies 2K words beginning at address 0x0000. Off-chip program memory uses the remaining 14K words beginning at address 0x0800. In this configuration–when MMAP = 0–the boot loading sequence (described below in ...
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ADSP-21xx Data Memory Interface The data memory address bus (DMA bits wide. The bidirectional external data bus is 24 bits wide, with the upper 16 bits used for data memory data (DMD) transfers. The data memory select (DMS) ...
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... ROM NRE Agreement & Minimum Quantity Order (MQO) Acceptance Agreement for Pre-Production ROM Products 2. Return the forms to Analog Devices along with two copies of the Memory Image File (.EXE file) of your ROM code. The files must be supplied on two 3.5" or 5.25" floppy disks for the IBM PC (DOS 2 ...
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... Prototype units may be applied toward the minimum order quantity. Upon completion of prototype manufacture, Analog Devices will ship prototype units and a delivery schedule update for production units. An invoice against your purchase order for the NRE charges is issued at this time ...
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Instruction Set The ADSP-21xx assembly language uses an algebraic syntax for ease of coding and readability. The sources and destinations of computations and data movements are written explicitly in each assembly statement, eliminating cryptic assembler mnemonics. Every instruction assembles into ...
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ADSP-21xx Program Flow Instructions DO <addr> [UNTIL term] ; [IF cond] JUMP (Ix) ; [IF cond] JUMP <addr>; [IF cond] CALL (Ix) ; [IF cond] CALL <addr>; IF [NOT ] FLAG_IN JUMP <addr>; IF [NOT ] FLAG_IN CALL <addr>; [IF ...
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ADSP-2101/2105/2115/2161/2163–SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS Parameter V Supply Voltage DD T Ambient Operating Temperature AMB See “Environmental Conditions” for information on thermal specifications. ELECTRICAL CHARACTERISTICS Parameter Hi-Level Input Voltage IH V Hi-Level CLKIN Voltage ...
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ADSP-21xx SPECIFICATIONS (ADSP-2101/2105/2115/2161/2163) SUPPLY CURRENT & POWER (ADSP-2101/2105/2115/2161/2163) Parameter 1 I Supply Current (Dynamic Supply Current (Idle) DD NOTES 1 Current reflects device operating with no output loads 0.4 V and 2.4 V. ...
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SPECIFICATIONS (ADSP-2101/2105/2115/2161/2163) POWER DISSIPATION EXAMPLE To determine total power dissipation in a specific application, the following equation should be applied for each output load capacitance output switching frequency. Example ...
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ADSP-21xx SPECIFICATIONS (ADSP-2101/2105/2115/2161/2163) TEST CONDITIONS Figure 14 shows voltage reference levels for ac measurements. INPUT OUTPUT Figure 14. Voltage Reference Levels for AC Measurements (Except Output Enable/Disable) Output Disable Time Output pins are considered to be disabled when they have ...
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ADSP-2111–SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS Parameter V Supply Voltage DD T Ambient Operating Temperature AMB See “Environmental Conditions” for information on thermal specifications. ELECTRICAL CHARACTERISTICS Parameter Hi-Level Input Voltage IH V Hi-Level CLKIN Voltage ...
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ADSP-21xx SPECIFICATIONS (ADSP-2111) SUPPLY CURRENT & POWER (ADSP-2111) Parameter 1 I Supply Current (Dynamic Supply Current (Idle) DD NOTES 1 Current reflects device operating with no output loads 0.4 V and 2.4 V. ...
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SPECIFICATIONS (ADSP-2111) POWER DISSIPATION EXAMPLE To determine total power dissipation in a specific application, the following equation should be applied for each output load capacitance output switching frequency. Example ...
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ADSP-21xx SPECIFICATIONS (ADSP-2111) TEST CONDITIONS Figure 20 shows voltage reference levels for ac measurements. INPUT OUTPUT Figure 20. Voltage Reference Levels for AC Measurements (Except Output Enable/Disable) Output Disable Time Output pins are considered to be disabled when they have ...
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ADSP-2103/2162/2164–SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS Parameter V Supply Voltage DD T Ambient Operating Temperature AMB See “Environmental Conditions” for information on thermal specifications. ELECTRICAL CHARACTERISTICS Parameter Hi-Level Input Voltage Lo-Level Input Voltage IL 2, ...
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ADSP-21xx SPECIFICATIONS (ADSP-2103/2162/2164) SUPPLY CURRENT & POWER (ADSP-2103/2162/2164) Parameter 1 I Supply Current (Dynamic Supply Current (Idle) DD NOTES 1 Current reflects device operating with no output loads 0.4 V and 2.4 V. ...
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SPECIFICATIONS (ADSP-2103/2162/2164) POWER DISSIPATION EXAMPLE To determine total power dissipation in a specific application, the following equation should be applied for each output load capacitance output switching frequency. Example ...
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ADSP-21xx SPECIFICATIONS (ADSP-2103/2162/2164) TEST CONDITIONS Figure 26 shows voltage reference levels for ac measurements. INPUT OUTPUT Figure 26. Voltage Reference Levels for AC Measurements (Except Output Enable/Disable) Output Disable Time Output pins are considered to be disabled when they have ...
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TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163) GENERAL NOTES Use the exact timing information given. Do not attempt to derive parameters from the addition or subtraction of others. While addition or subtraction would yield meaningful results for an individual device, the values given in ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163) CLOCK SIGNALS & RESET 13 MHz Parameter Min Timing Requirement: t CLKIN Period 76 CLKIN Width Low 20 CKL t CLKIN Width High 20 CKH t RESET Width Low 384.5 RSP Switching Characteristic: t ...
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TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163) INTERRUPTS & FLAGS Parameter Timing Requirement IRQx or FI Setup before IFS 2, 3 CLKOUT Low 1 t IRQx or FI Setup before IFS 2, 3 CLKOUT Low (ADSP-2111 IRQx or FI Hold ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163) BUS REQUEST/GRANT Parameter Timing Requirement Hold after CLKOUT High Setup before CLKOUT Low BS Switching Characteristic: t CLKOUT High to DMS, SD PMS, BMS, RD, WR Disable t DMS, ...
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TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163) MEMORY READ Parameter Timing Requirement Low to Data Valid RDD t A0–A13, PMS, DMS, BMS to Data Valid AA t Data Hold from RD High RDH Switching Characteristic Pulse Width RP t CLKOUT ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163) MEMORY WRITE Parameter Switching Characteristic: t Data Setup before WR High DW t Data Hold after WR High Pulse Width Low to Data Enabled WDE t A0–A13, DMS, PMS Setup ...
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TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163) SERIAL PORTS Parameter Timing Requirement: t SCLK Period SCK t DR/TFS/RFS Setup before SCLK Low SCS t DR/TFS/RFS Hold after SCLK Low SCH t SCLK Width SCP IN Switching Characteristic: t CLKOUT High to SCLK CC OUT ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2111) HOST INTERFACE PORT Separate Data & Address (HMD1 = 0 ) Read Strobe & Write Strobe (HMD0 = 0) Parameter Timing Requirement: t HA2-0 Setup before Start of Write or Read HSU t Data Setup before ...
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HA2–0 HSEL Host Write Cycle HWR HACK HD15–0 HA2–0 HSEL HRD Host Read Cycle HACK HD15–0 Figure 35. Host Interface Port (HMD1 = 0, HMD0 = 0) REV. B ADDRESS t HRWP t HSU HSHK HKH ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2111) HOST INTERFACE PORT Separate Data & Address (HMD1 = 0) Read/Write Strobe & Data Strobe (HMD0 = 1) Parameter Timing Requirement: t HA2-0, HRW Setup before Start of Write or Read HSU t Data Setup before ...
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HA2–0 HSEL HRW Host Write Cycle HDS HACK HD15–0 HA2–0 HSEL HRW Host Read Cycle HDS HACK HD15–0 REV. B ADDRESS t HRWP t HSU t HSHK DATA t HDSU ADDRESS t HRWP t HSU t HSHK DATA t HDE ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2111) HOST INTERFACE PORT Multiplexed Data & Address (HMD1 = 1) Read Strobe & Write Strobe (HMD0 = 0) Parameter Timing Requirement: t ALE Pulse Width HALP t HAD15-0 Address Setup before ALE Low HASU t HAD15-0 ...
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ALE HSEL HWR Host Write Cycle HACK HD15–0 ALE HSEL Host Read Cycle HRD HACK HAD15–0 Figure 37. Host Interface Port (HMD1 = 1, HMD0 = 0) REV HALP t HRWP t HALS t HSHK t t HASU ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2111) HOST INTERFACE PORT Multiplexed Data & Address (HMD1 = 1) Read/Write Strobe & Data Strobe (HMD0 = 1 ) Parameter Timing Requirement: t ALE Pulse Width HALP t HAD15-0 Address Setup before ALE Low HASU t ...
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ALE HSEL HRW HDS Host Write Cycle HACK HD15–0 ALE HSEL HRW Host Read Cycle HDS HACK HD15–0 Figure 38. Host Interface Port (HMD1 = 1, HMD0 = 1) REV HALP t HRWP t HALS t HSU t ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2103/2162/2164) GENERAL NOTES Use the exact timing information given. Do not attempt to derive parameters from the addition or subtraction of others. While addition or subtraction would yield meaningful results for an individual device, the values given ...
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TIMING PARAMETERS (ADSP-2103/2162/2164) CLOCK SIGNALS & RESET Parameter Timing Requirement: t CLKIN Period CK t CLKIN Width Low CKL t CLKIN Width High CKH t RESET Width Low RSP Switching Characteristic: t CLKOUT Width Low CPL t CLKOUT Width High ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2103/2162/2164) INTERRUPTS & FLAGS Parameter Timing Requirement IRQx or FI Setup before CLKOUT Low IFS 1 t IRQx or FI Hold after CLKOUT High IFH Switching Characteristic Hold after CLKOUT High FOH t ...
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TIMING PARAMETERS (ADSP-2103/2162/2164) BUS REQUEST/GRANT Parameter Timing Requirement Hold after CLKOUT High Setup before CLKOUT Low BS Switching Characteristic: t CLKOUT High to DMS, PMS, BMS, RD, WR Disable SD t DMS, PMS, BMS, RD, ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2103/2162/2164) MEMORY READ Parameter Timing Requirement Low to Data Valid RDD t A0–A13, PMS, DMS, BMS to Data Valid AA t Data Hold from RD High RDH Switching Characteristic Pulse Width RP t ...
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TIMING PARAMETERS (ADSP-2103/2162/2164) MEMORY WRITE Parameter Switching Characteristic: t Data Setup before WR High DW t Data Hold after WR High Pulse Width Low to Data Enabled WDE t A0–A13, DMS, PMS Setup before ...
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ADSP-21xx TIMING PARAMETERS (ADSP-2103/2162/2164) SERIAL PORTS Parameter Timing Requirement: t SCLK Period SCK t DR/TFS/RFS Setup before SCLK Low SCS t DR/TFS/RFS Hold after SCLK Low SCH t SCLK Width SCP in Switching Characteristic: t CLKOUT High to SCLK CC ...
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RESET IRQ2 2 A6 MMAP 3 GND PGA PACKAGE 5 A10 A11 ADSP-2101 A12 6 A13 7 ...
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ADSP-21xx GND 10 D19 11 D20 12 D21 13 D22 14 D23 MMAP IRQ2 19 RESET PLCC Pin PLCC ...
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GND 3 GND A10 8 A11 9 A12 10 A13 11 PMS 12 DMS 13 BMS XTAL 16 CLKIN ...
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ADSP-21xx D23 D21 D20 D18 D16 D13 D12 D10 M MMAP GND D22 D19 D17 D14 D11 D9 BR RESET D15 GND D8 L PMS BMS DMS J ...
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GND MMAP RESET PMS DMS BMS GND A10 A11 VDD NOTE: PIN 1 IS LOCATED AT THE CENTER OF THE BEVELED-EDGE SIDE OF THE ...
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ADSP-21xx PGA LOCATION A1 QUADRANT MARKING D A SEATING PLANE b SYMBOL OUTLINE DIMENSIONS ADSP-2101 68-Pin Grid Array (PGA) GUIDE PIN ONLY TOP ...
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PIN 1 IDENTIFIER TOP VIEW (PINS DOWN SYMBOL REV. B OUTLINE DIMENSIONS ADSP-21xx 68-Lead Plastic Leaded Chip Carrier (PLCC ...
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ADSP-21xx SEATING PLANE MILLIMETERS SYMBOL MIN TYP MAX A 2. 1.90 2.00 2. 16.95 17.20 17. 13.90 14.00 14. ...
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PGA LOCATION A1 QUADRANT MARKING D A SEATING b PLANE SYMBOL REV. B OUTLINE DIMENSIONS ADSP-2111 100-Pin Grid Array (PGA ...
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ADSP-21xx SEATING PLANE SYMBOL ...
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Part Number 1 ADSP-2101KG-66 ADSP-2101BG-66 ADSP-2101KP-66 ADSP-2101BP-66 ADSP-2101KS-66 ADSP-2101BS-66 ADSP-2101KG-80 ADSP-2101BG-80 ADSP-2101KP-80 ADSP-2101BP-80 ADSP-2101KS-80 ADSP-2101BS-80 ADSP-2101KP-100 ADSP-2101BP-100 ADSP-2101KS-100 ADSP-2101BS-100 ADSP-2101KG-100 ADSP-2101BG-100 ADSP-2101TG-50 ADSP-2103KP-40 (3.3 V) ADSP-2103BP-40 (3.3 V) ADSP-2103KS-40 (3.3 V) ADSP-2103BS-40 (3.3 V) ADSP-2105KP-55 ADSP-2105BP-55 ADSP-2105KP-80 ADSP-2105BP-80 ADSP-2115KP-66 ADSP-2115BP-66 ...
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ADSP-21xx 1 Part Number ADSP-2111KG-52 ADSP-2111BG-52 ADSP-2111KS-52 ADSP-2111BS-52 ADSP-2111KG-66 ADSP-2111BG-66 ADSP-2111KS-66 ADSP-2111BS-66 ADSP-2111KG-80 ADSP-2111BG-80 ADSP-2111KS-80 ADSP-2111BS-80 ADSP-2111TG-52 2 ADSP-2161KP-66 2 ADSP-2161BP-66 2 ADSP-2161KS-66 2 ADSP-2161BS-66 2 ADSP-2162KP-40 (3 ADSP-2162BP-40 (3 ADSP-2162KS-40 (3 ADSP-2162BS-40 (3.3 ...
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