GM71C4263CJ-60 Hynix Semiconductor, GM71C4263CJ-60 Datasheet
GM71C4263CJ-60
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GM71C4263CJ-60 Summary of contents
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LG Semicon Co.,Ltd. Description The GM71C(S)4263C/CL is the new generation dynamic RAM organized 262,144 x 16 bit. GM71C(S)4263C/CL has realized higher density, higher performance functions by utilizing advanced CMOS process technology. The GM71C(S)4263C/CL offers Extended Data Out(EDO) Mode as a ...
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... LG Semicon Pin Description Pin A0-A8 Address Inputs A0-A8 Refresh Address Inputs I/O0-I/O15 Data Input / Data Output RAS Row Address Strobe Column Address Strobe UCAS, LCAS Ordering Information Type No. GM71C4263CJ-60 GM71C4263CJ-70 GM71C4263CJ-80 GM71CS4263CLJ-60 GM71CS4263CLJ-70 GM71CS4263CLJ-80 2 Function Pin Access Time 60ns 70§À ...
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LG Semicon Absolute Maximum Ratings* Symbol T Ambient Temperature under Bias A T Storage Temperature (Plastic) STG V /V Voltage on any Pin Relative OUT V Voltage Short Circuit Output Current OUT P ...
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LG Semicon DC Electrical Characteristics (V Symbol Output Level V OH Output "H" Level Voltage (I V Output Level OL Output "L" Level Voltage (I I Operating Current CC1 Average Power Supply Operating Current (RAS, LCAS or UCAS Cycling: t ...
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LG Semicon Capacitance (V = 5V+/-10 Symbol C Input Capacitance (Address Input Capacitance (Clocks Output Capacitance (Data-In/Out) I/O Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method ...
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LG Semicon Read Cycle Symbol Parameter t Access Time from RAS RAC t Access Time from CAS CAC t Access Time from Address AA t Access Time from OE OAC t Read Command Setup Time RCS t Read Command Hold ...
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LG Semicon Read- Modify-Write Cycle Symbol Parameter t Read-Modify-Write Cycle Time RWC t RAS to WE Delay Time RWD t CAS to WE Delay Time CWD t Column Address to WE Delay Time AWD t OE Hold Time from WE ...
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LG Semicon Self-Refresh Mode Symbol Parameter t RAS Pulse Width (Self-Refresh) RASS t RAS Precharge Time (Self-Refresh) RPS t CAS Hold Time (Self-Refresh) CHS Notes Measurements assume t 2. Assumes that t <=t (max) and t RCD RCD ...
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LG Semicon 15. In delayed write or read-modify-write cycles, OE must disable output buffer prior to applying data to the device. After RAS is reset impedance ); if t > t OEH CWL Either must ...
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LG Semicon Notes concerning 2CAS control Please do not separate the UCAS/LCAS operation timing intentionally. However skew between UCAS/LCAS are allowed under the following conditions. 1) Each of the UCAS/LCAS should satisfy the timing specifications individually. 2) Different operation mode ...
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LG Semicon Timing Waveforms RAS t T UCAS LCAS t ASR ADDRESS ROW High-Z D OUT RAS t CSH t t RCD RSH t CAS t t RAD RAL t CAL t t ...
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LG Semicon RAS t T UCAS LCAS t ASR ADDRESS ROW OUT RAS RCD CAS t CSH RAH ASC CAH COLUMN t t WCS WCH t ...
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LG Semicon RAS t T UCAS LCAS t ASR ADDRESS ROW OUT FIGURE 3. DELAYED WRITE CYCLE *Note : In delayed write or read-modify-write cycles, OE must disable output buffer prior to applying data to ...
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LG Semicon RAS t T UCAS LCAS t t ASR ADDRESS ROW OUT FIGURE 4. READ MODIFY WRITE CYCLE *Note : In delayed write or read-modify-write cycles, OE must disable output buffer prior to applying ...
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LG Semicon RAS CRP UCAS LCAS t ASR ADDRESS ROW t OFR t OFF INVALID D OUT D OUT FIGURE 5. RAS ONLY REFRESH CYCLE RAS t RPC t RAH High-Z GM71C4263C GM71CS4263CL t ...
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LG Semicon t RP RAS t RPC t CP UCAS LCAS ADDRESS t OFR t OFF INVALID D OUT D OUT FIGURE 6. CAS BEFORE RAS REFRESH CYCLE RAS RPC t ...
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LG Semicon RAS UCAS LCAS t RAD t t ASR RAH t ADDRESS ROW High-Z D OUT FIGURE 7. HIDDEN REFRESH CYCLE RAS RP RAS t RCD ...
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LG Semicon RAS RCD UCAS LCAS t RAD ASR RAH ADDRESS ROW COLUMN 1 t RCS WE OE High-Z D OUT INVALID D FIGURE 8. EXTENDED DATA OUT MODE READ CYCLE 18 t ...
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LG Semicon RAS CSH t CAS UCAS LCAS t RCHR t RCS WE t ASC t CAH t t ASR RAH ROW ADDRESS COLUMN 1 t CAL t DZC High DZO OE High-Z D ...
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LG Semicon RAS t T LCAS UCAS t ASR t t RAH ASC COLUMN ADDRESS ROW t DZC t RCS DZO OE t RAC High - Z LD OUT High - Z UD OUT FIGURE 10. ...
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LG Semicon RAS t T UCAS t LCAS ASR t RAH ADDRESS ROW OUT FIGURE 11. EXTENDED DATA OUT MODE EARLY WRITE CYCLE t RASP t t CSH HPC RCD CAS CP t ...
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LG Semicon RAS RCD UCAS LCAS t RAD t t ASR ASC t RAH ADDRESS ROW t RCS WE t DZC DZO OE D OUT INVALID D FIGURE 12. EXTENDED DATA OUT MODE DELAYED ...
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LG Semicon RAS RCD UCAS t LCAS RAD t ASR t RAH COLUMN ROW ADDRESS t RCS WE t DZC DZO OE t RAC D OUT INVALID D FIGURE 13. EXTENDED DATA OUT MODE ...
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LG Semicon RAS RCD UCAS LCAS t CSH t WCS WE t RAH t ASR COLUMN ROW ADDRESS High - Z D OUT FIGURE 14. EXTENDED DATA OUT MODE MIX CYCLE ...
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LG Semicon RAS RCD t CSH UCAS LCAS t RCHR t RCS WE t RAH t ASR COLUMN ROW ADDRESS High - RAC D OUT FIGURE 15. EXTENDED DATA OUT MODE MIX ...
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LG Semicon t RP RAS t RPC t CP UCAS LCAS t t OFF INVALID D OUT D OUT The low self refresh current is achieved by introducing extremely long internal refresh cycle. Therefore some care needs to be taken ...
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LG Semicon Package Dimension 40 SOJ 1.010(25.67) MIN 1.021(25.93) MAX 0.050(1.27) TYP 0.015(0.38) MIN 0.020(0.50) MAX 0.128(3.25) MIN 0.148(3.75) MAX 0.026(0.66) MIN 0.032(0.81) MAX GM71C4263C GM71CS4263CL Unit: Inches (mm) 0.025(0.64) MIN 0.083(2.10) MIN 27 ...