JS28F160C3BD70 Intel Corporation, JS28F160C3BD70 Datasheet
JS28F160C3BD70
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Intel® Advanced+ Boot Block Flash Memory (C3) 28F800C3, 28F160C3, 28F320C3 (x16) Product Features Flexible SmartVoltage Technology — 2.7 V– 3.6 V read/program/erase — for fast production programming 3.6 V ...
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... Intel may make changes to specifications and product descriptions at any time, without notice. Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights ...
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Contents 1.0 Introduction....................................................................................................................................7 1.1 Nomenclature ....................................................................................................................... 7 1.2 Conventions .......................................................................................................................... 7 2.0 Functional Overview ..................................................................................................................... 8 2.1 Product Overview .................................................................................................................8 2.2 Block Diagram ......................................................................................................................9 2.3 Memory Map ......................................................................................................................... 9 3.0 Package Information ................................................................................................................... 12 3.1 mBGA* and VF BGA Package............................................................................................12 ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 9.1 Bus Operations ................................................................................................................... 39 9.1.1 Read ...................................................................................................................... 39 9.1.2 Write ...................................................................................................................... 39 9.1.3 Output Disable ....................................................................................................... 39 9.1.4 Standby.................................................................................................................. 40 9.1.5 Reset ..................................................................................................................... 40 10.0 Modes of Operation..................................................................................................................... 41 10.1 Read Mode ...
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Revision History Date of Version Revision 05/12/98 -001 Original version 48-Lead TSOP package diagram change µBGA package diagrams change 32-Mbit ordering information change (Section 6) CFI Query Structure Output Table Change (Table C2) 07/21/98 -002 CFI Primary-Vendor Specific Extended Query ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Date of Version Revision Updated 64Mb product offerings. Updated 16Mb product offerings. 4/05/02 -014 Revised and corrected DC Characteristics Table. Added mechanicals for Easy BGA. Minor text edits throughout document. 3/06/03 -016 Complete ...
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Introduction This datasheet contains the specifications for the Intel (C3) device family, hereafter called the C3 flash memory device. These flash memories add features such as instant block locking and protection registers that can be used to enhance the ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 2.0 Functional Overview This section provides an overview of the Intel features and architecture. 2.1 Product Overview The C3 flash memory device provides high-performance asynchronous reads in package- compatible densities with a 16 ...
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Block Diagram Figure 1. C3 Flash Memory Device Block Diagram V CCQ Power Reduction Control Y-Decoder A[MAX:MIN] Input Buffer Address Latch X-Decoder Address Counter 2.3 Memory Map The Intel® Advanced+ Boot Block Flash Memory (C3) device is asymmetrically blocked, ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 1. Top Boot Memory Map 8-Mbit Size Memory Size Blk (KW) Addressing (KW) (Hex) 7F000 7FFFF 7E000 7EFFF 7D000 7DFFF 7C000 ...
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Table 2. Bottom Boot Memory Map 8-Mbit Size Memory Size Blk Blk (KW) Addressing (KW) (Hex 78000-7FFFF 70000-77FFF 68000-6FFFF 60000-67FFF 32 ... ... ... ... 32 10 18000-1FFFF 32 ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 3.0 Package Information µBGA* and VF BGA Package 3.1 µ Figure 2. BGA* and VF BGA Package Drawing and Dimensions Ball A1 Corner ...
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TSOP Package Figure 3. TSOP Package Drawing and Dimensions Z Pin 1 Detail B b Dimensions Package Height Standoff Package Body Thickness Lead Width Lead Thickness Plastic Body Length Package Body Width Lead Pitch Terminal Dimension Lead Tip Length ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 3.3 Easy BGA Package Figure 4. Easy BGA Package Drawing and Dimension Ball A1 Corner Top View - Ball side down ...
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Ballout and Signal Descriptions The C3 device is available in 48-lead TSOP, 48-ball VF BGA, 48-ball µBGA, and Easy BGA packages. See Figure 5 on page 4.1 48-Lead TSOP Package Figure 5. 48-Lead TSOP Package ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Figure 6. Mark for Pin-1 Indicator on 48-Lead 8-Mb, 16-Mb and 32-Mb TSOP Current M ark: New M ark: Note: The topside marking on 8 Mb, 16 Mb, and 32 Mb Intel Advanced ...
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Figure 7. 48-Ball µBGA* and 48-Ball VF BGA Chip Scale Package (Top View, Ball Down A13 A11 B A14 A10 C A15 A12 D A16 D14 E V D15 CCQ F GND D7 Notes: 1. Shaded connections ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 4.2 64-Ball Easy BGA Package Figure 8. 64-Ball Easy BGA Package ( RP# ...
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Table 4. Signal Descriptions Symbol Type RESET/DEEP POWER-DOWN: Active-low input. When RP logic low, the device is in reset/deep power-down mode, which drives the outputs to RP# Input High-Z, resets the Write State Machine, and minimizes current levels ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 5.0 Maximum Ratings and Operating Conditions 5.1 Absolute Maximum Ratings Warning: Stressing the device beyond the “Absolute Maximum Ratings” may cause permanent damage. These ratings are stress ratings only. Operation beyond the “Operating ...
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Table 5. Temperature and Voltage Operating Conditions Symbol V PP2 Cycling Block Erase Cycling Notes: 1.V and V must share the same supply when they are in the V CC CCQ Max = 3.3 V for 0.25 µ m 32-Mbit ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 6.0 Electrical Specifications 6.1 Current Characteristics Table 6. DC Current Characteristics (Sheet Sym Parameter V CCQ Note I Input Load Current 1,2 LI Output Leakage I 1,2 LO ...
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Table 6. DC Current Characteristics (Sheet Sym Parameter V CCQ Note V Erase Suspend CC Current for 0.13 and 0.18 Micron Product I / CCES 1,4,5 I CCWS V Erase Suspend CC Current for 0.25 ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 6.2 DC Voltage Characteristics Table 7. DC Voltage Characteristics V 2.7 V–3 Sym Parameter V 2.7 V–3.6 V CCQ Note Min Input Low V –0.4 IL Voltage Input High V 2.0 ...
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AC Characteristics 7.1 AC Read Characteristics Table 8. Read Operations—8-Mbit Density Density Product # Sym Parameter V CC Note R1 t Read Cycle Time 3,4 AVAV Address 3,4 AVQV Output Delay CE# to Output R3 t ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 9. Read Operations—16-Mbit Density Density Product # Sym Parameter 2.7 V–3 Min (ns Read Cycle Time AVAV Address to Output R2 t AVQV Delay R3 t CE# ...
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Table 10. Read Operations—32-Mbit Density Density Product # Sym Parameter 2.7 V–3 Min (ns Read Cycle Time AVAV Address to Output R2 t AVQV Delay R3 t CE# to Output Delay ELQV R4 t ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 11. Read Operations — 64-Mbit Density # Sym R1 t Read Cycle Time AVAV R2 t Address to Output Delay AVQV R3 t CE# to Output Delay ELQV R4 t OE# to ...
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AC Write Characteristics Table 12. Write Operations—8-Mbit Density # Sym Parameter t / PHWL W1 RP# High Recovery to WE# (CE#) Going Low t PHEL t / ELWL W2 CE# (WE#) Setup to WE# (CE#) Going Low t WLEL ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 13. Write Operations—16-Mbit Density # Sym Parameter t / RP# High Recovery to WE# (CE#) Going PHWL W1 t Low PHEL t / ELWL W2 CE# (WE#) Setup to WE# (CE#) Going ...
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Table 14. Write Operations—32-Mbit Density # Sym Parameter t / RP# High Recovery to WE# (CE#) PHWL W1 t Going Low PHEL t / CE# (WE#) Setup to WE# (CE#) ELWL W2 t Going Low WLEL t WLWH W3 / ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 15. Write Operations—64-Mbit Density # Symbol RP# High Recovery to WE# (CE#) Going Low PHWL PHEL CE# (WE#) Setup to WE# (CE#) Going Low ...
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Erase and Program Timings Table 16. Erase and Program Timings Symbol 4-KW Parameter Block t BWPB Word Program Time 32-KW Main Block t BWMB Word Program Time Word Program Time for 0.13 and 0.18 Micron Product ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Figure 12. Transient Equivalent Testing Load Circuit Note: See Table 17 for component values. Table 17. Test Configuration Component Values for Worst-Case Speed Conditions Test Configuration V Min Standard Test CCQ Note: C ...
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Power and Reset Specifications ® Intel flash devices have a tiered approach to power savings that can significantly reduce overall system power consumption. The Automatic Power Savings (APS) feature reduces power consumption when the device is selected but idle. ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 8.5 Power and Reset Considerations 8.5.1 Power-Up/Down Characteristics To prevent any condition that may result in a spurious write or erase operation, Intel recommends to power-up VCC and VCCQ together. Conversely, VCC and ...
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Reset Specifications Table 19. Reset Specifications Symbol RP# Low to Reset during Read t (If RP# is tied to V PLPH applicable) t RP# Low to Reset during Block Erase PLRH1 t RP# Low to Reset during Program PLRH2 ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Transient current magnitudes depend on the device outputs’ capacitive and inductive loading. Two- line control and proper decoupling capacitor selection will suppress these transient voltage peaks. Each flash device should have a 0.1 ...
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Device Operations The Intel® Advanced+ Boot Block Flash Memory (C3) device uses a CUI and automated algorithms to simplify Program and Erase operations. The CUI allows for 100% CMOS - level control inputs and fixed power supplies during erasure ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 9.1.4 Standby Deselecting the device by bringing CE logic - high level (V mode, which substantially reduces device power consumption without any latency for subsequent read accesses. In standby, outputs are ...
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Modes of Operation 10.1 Read Mode The flash memory has four read modes (read array, read identifier, read status, and CFI query) and two write modes (program and erase). Three additional modes (erase suspend to program, erase suspend to ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 21. Device Identification Codes Item Base Manufacturer ID Block Device ID Block 2 Block Lock Status Block 2 Block Lock-Down Status Block Protection Register Lock Status Block Protection Register Block Notes: 1.The ...
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The contents of the Status Register are latched on the falling edge of OE# or CE# (whichever occurs last) which prevents possible bus errors that might occur if Status Register contents change while being read. CE# or OE# must be ...
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Intel® Advanced+ Boot Block Flash Memory (C3) When V is connected power supply, the device draws program and erase current PP directly from the VPP pin. This eliminates the need for an external switching transistor to ...
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Suspending and Resuming Erase Since an Erase operation requires on the order of seconds to complete, an Erase Suspend command is provided to allow erase - sequence interruption to read data from—or program data to— another block in memory. ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 22. Command Bus Operations Command Read Array Read Identifier CFI Query Read Status Register Clear Status Register Program Block Erase/Confirm Program/Erase Suspend Program/Erase Resume Lock Block Unlock Block Lock-Down Block Protection Program ...
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Table 23. Command Codes and Descriptions Code Device Mode (HEX) FF Read Array This command places the device in read-array mode, which outputs array data on the data pins. This is a two - cycle command. The first cycle prepares ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 24. Status Register Bit Definition WSMS ESS SR[7] WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy SR[6] = ERASE - SUSPEND STATUS (ESS ...
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Security Modes 11.1 Flexible Block Locking The Intel® Advanced+ Boot Block Flash Memory (C3) device offers an instant, individual block- locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 11.1.1 Locking Operation The locking status of each block can be set to Locked, Unlocked, or Lock-Down, each of which will be described in the following sections. See page 49 and Figure 21, ...
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Locking Operations during Erase Suspend Changes to block-lock status can be performed during an erase-suspend by using the standard locking command sequences to Unlock, Lock, or Lock Down a block. This operation is useful in the case when another ...
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Intel® Advanced+ Boot Block Flash Memory (C3) 11.5.1 Reading the Protection Register The protection register is read in the Read-Identifier mode. The device is switched to this mode by issuing the Read Identifier command (0x90). Once in this mode, read ...
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Program Protection In addition to the flexible block locking, the V hardware write protection of all blocks in the flash device. When V any Program or Erase operation will result in an error, prompting the corresponding Status Register bit ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Appendix A Write State Machine States Table 25 and Table 26 commands. Table 25. Write State Machine States Data Read Array Current State SR.7 When (FFH) Read Read Array “1” Array Read Array ...
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Table 26. Write State Machine States, Continued Read Config Read Query Current State (90H) (98H) Read Array Read Config. Read Query Read Status Read Config. Read Query Read Config. Read Config. Read Query Read Query Read Config. Read Query Lock ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Appendix B Flow Charts Figure 17. Word Program Flowchart Start Write 0x40, Word Address Write Data, Word Address Read Status Register 0 SR[ Full Status Check (if desired) Program Complete Read ...
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Figure 18. Program Suspend / Resume Flowchart Start Write 0xB0 (Program Suspend) Any Address Write 0x70 (Read Status) Any Address Read Status Register 0 SR[ SR[ Write 0xFF (Read Array) Read Array Data Done No ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Figure 19. Erase Suspend / Resume Flowchart Start Write 0xB0, Any Address Write 0x70, Any Address Read Status Register SR[7] = SR[6] = Write 0xFF Read Array (Read Array) Data Done Reading Write ...
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Figure 20. Block Erase Flowchart Start Write 0x20, (Block Erase) Block Address Write 0xD0, (Erase Confirm) Block Address Read Status Register 0 SR[ Full Erase Status Check (if desired) Block Erase Complete Read Status Register 1 SR[3] = ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Figure 21. Locking Operations Flowchart Start Write 0x60, Block Address Write either 0x01/0xD0/0x2F, Block Address Write 0x90 Read Block Lock Status Locking Change? Yes Write 0xFF Any Address Lock Change Complete May 2005 ...
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Figure 22. Protection Register Programming Flowchart Start Write 0xC0, PR Address Write PR Address & Data Read Status Register SR[ Full Status Check (if desired) Program Complete Read Status Register Data SR[3], SR[ SR[3], SR[4] = ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Appendix C Common Flash Interface This appendix defines the data structure or “database” returned by the Common Flash Interface (CFI) Query command. System software should parse this structure to gain critical information such ...
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Table 28. Example of Query Structure Output of x16 Devices Offset A[X-0] 0x00010 0x00011 0x00012 0x00013 0x00014 0x00015 0x00016 0x00017 0x00018 ... C.2 Query Structure Overview The Query command causes the flash component to display the Common Flash Interface (CFI) ...
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Intel® Advanced+ Boot Block Flash Memory (C3) C.3 Block Status Register The Block Status Register indicates whether an erase operation completed successfully or whether a given block is locked or can be accessed for flash program/erase operations. See Block Erase ...
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C.4 CFI Query Identification String The Identification String provides verification that the component supports the Common Flash Interface specification. It also indicates the specification version and supported vendor-specified command set(s). See Table 31. CFI Identification Offset Length 0x10 3 Query-unique ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Table 32. System Interface Information Offset Length V logic supply minimum program/erase voltage CC 0x1B 1 bits 0–3 BCD 100 mV bits 4–7 BCD volts V logic supply maximum program/erase voltage CC 0x1C ...
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Table 34. Device Geometry Details 16 Mbit Address -B 0x27 --15 0x28 --01 0x29 --00 0x2A --00 0x2B --00 0x2C --02 0x2D --07 0x2E --00 0x2F --20 0x30 --00 0x31 --1E 0x32 --00 0x33 --00 0x34 --01 Datasheet Intel® Advanced+ ...
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Intel® Advanced+ Boot Block Flash Memory (C3) C.6 Intel-Specific Extended Query Table Certain flash features and commands are optional as shown in Extended Query” on page well as other similar types of information. Table 35. Primary-Vendor Specific Extended Query 1 ...
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Table 36. Protection Register Information 1 Offset Length P = 0x35 (Optional Flash Features and Commands) Number of Protection register fields in JEDEC ID space. 0x(P+E) 1 “00h,” indicates that 256 protection bytes are available 0x(P+F) 0x(P+10) (0xP+11) Protection Field ...
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Intel® Advanced+ Boot Block Flash Memory (C3) Appendix D Additional Information Order Number 297938 292216 292215 Contact your Intel Representative 297874 Notes: 1.Call the Intel Literature Center at (800) 548-4725 to request Intel documentation. International customers should contact their local ...
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Appendix E Ordering Information Figure 23. Component Ordering Information Package TE = 48- Lead TSOP GT = 48- Ball µBGA * CSP BGA ...
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... TE28F160C3BD70 TE28F160C3TC70 TE28F160C3BC70 TE28F160C3TC80 TE28F160C3BC80 TE28F160C3TC90 Extended TE28F160C3BC90 16 Mbit TE28F160C3TA90 TE28F160C3BA90 TE28F160C3TA110 TE28F160C3BA110 JS28F160C3BD70 JS28F160C3TD70 TE28F800C3TD70 TE28F800C3BD70 TE28F800C3TA90 TE28F800C3BA90 Extended 8 Mbit TE28F800C3TA110 TE28F800C3BA110 JS28F800C3BD70 JS28F800C3TD70 Note: The second line of the 48-ball µBGA package top side mark specifies assembly codes. For samples only, the first character signifies either “ ...