AT89C51ED2 Atmel Corporation, AT89C51ED2 Datasheet - Page 99
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AT89C51ED2
Manufacturer Part Number
AT89C51ED2
Description
Manufacturer
Atmel Corporation
Specifications of AT89C51ED2
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
2
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes
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24.6.3
4235K–8051–05/08
Functional Description
Specific Protocol
External Host with
Communication
Figure 24-3. Bootloader Functional Description
On the above diagram, the on-chip bootloader processes are:
The purpose of this process is to manage the communication and its protocol between the on-
chip bootloader and a external device. The on-chip ROM implements a serial protocol (see sec-
tion “Bootloader Protocol”). This process translate serial communication frame (UART) into
Flash memory access (read, write, erase, etc.).
Several Application Program Interface (API) calls are available for use by an application pro-
gram to permit selective erasing and programming of Flash pages. All calls are made through a
common interface (API calls), included in the ROM bootloader. The programming functions are
selected by setting up the microcontroller’s registers before making a call to a common entry
point (0xFFF0). Results are returned in the registers. The purpose on this process is to translate
the registers values into internal Flash Memory Management.
This process manages low level access to Flash memory (performs read and write access).
• ISP Communication Management
• User Call Management
• Flash Memory Management
ISP Communication
Management
Flash Memory
Management
Memory
Flash
Management (API)
User Call
AT89C51RD2/ED2
Application
User
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