AT90USB647 Atmel Corporation, AT90USB647 Datasheet - Page 149
AT90USB647
Manufacturer Part Number
AT90USB647
Description
Manufacturer
Atmel Corporation
Specifications of AT90USB647
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
48
Ext Interrupts
16
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
10
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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15. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
15.1
7593K–AVR–11/09
Overview
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. The main
features are:
•
•
•
•
•
•
•
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 15-1.. For the actual
placement of I/O pins, see
ing I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations
are listed in the
The Power Reduction Timer/Counter2 bit, PRTIM2, in
page 54
Figure 15-1. 8-bit Timer/Counter Block Diagram
Single Channel Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV2, OCF2A and OCF2B)
Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
must be written to zero to enable Timer/Counter2 module.
Status flags
“8-bit Timer/Counter Register Description” on page
Timer/Counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
“Pin Configurations” on page
Direction
Count
ASSRn
Clear
Synchronized Status flags
Control Logic
TOP
=
TCCRnB
asynchronous mode
Value
BOTTOM
Fixed
TOP
select (ASn)
clk
=
Tn
0
Prescaler
Synchronization Unit
“Power Reduction Register 0 - PRR0” on
OCnA
(Int.Req.)
OCnB
(Int.Req.)
Generation
Generation
3. CPU accessible I/O Registers, includ-
Waveform
Waveform
AT90USB64/128
160.
TOVn
(Int.Req.)
OCnA
OCnB
Oscillator
T/C
clk
I/O
clk
clk
I/O
ASY
TOSC1
TOSC2
149
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