ATmega168 Automotive Atmel Corporation, ATmega168 Automotive Datasheet - Page 26
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ATmega168 Automotive
Manufacturer Part Number
ATmega168 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA168_AUTOMOTIVE.pdf
(19 pages)
3.ATMEGA168_AUTOMOTIVE.pdf
(340 pages)
Specifications of ATmega168 Automotive
Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA168_AUTOMOTIVE PDF datasheet #2
- ATMEGA168_AUTOMOTIVE PDF datasheet #3
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- Download datasheet (4Mb)
7.1.4
7.2
7.3
26
Clock Sources
Default Clock Source
Atmel ATtiny24/44/84 [Preliminary]
ADC Clock – clk
ADC
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O
clocks in order to reduce noise generated by their digital circuitry. This gives more accurate
ADC conversion results.
The device has the following clock source options, selectable by Flash Fuse bits as shown
below. The clock from the selected source is input to the Atmel
routed to the appropriate modules.
Table 7-1.
Note:
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from power-down or power-save, the selected clock source is used to time the
start-up, ensuring stable oscillator operation before instruction execution starts. When the
CPU starts from reset, there is an additional delay allowing the power to reach a stable level
before commencing normal operation. The watchdog oscillator is used for timing this real-time
part of the start-up time. The number of WDT oscillator cycles used for each time-out is shown
in
Table 7-2.
The device is shipped with CKSEL = “0010”, SUT = “10”, and CKDIV8 programmed. The
default clock source setting is therefore the Internal RC Oscillator running at 8.0MHz with lon-
gest start-up time and an initial system clock prescaling of 8, resulting in 1.0MHz system clock.
This default setting ensures that all users can make their desired clock source setting using an
In-System or High-voltage Programmer.
Device Clocking Option
External Clock
Calibrated Internal RC Oscillator 8.0MHz
Watchdog Oscillator 128kHz
External Low-frequency Oscillator
External Crystal/Ceramic Resonator
Reserved
Table 7-2 on page
1. For all fuses “1” means unprogrammed while “0” means programmed.
Typ Time-out
Device Clocking Options Select
Number of Watchdog Oscillator Cycles
64ms
4ms
26.
(1)
Number of Cycles
8K (8,192)
®
512
AVR
0101, 0111, 0011,0001
®
clock generator, and
CKSEL3..0
1000-1111
0000
0010
0100
0110
7701E–AVR–02/11
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