ATmega48 Automotive Atmel Corporation, ATmega48 Automotive Datasheet - Page 278

• Manufacturer Part Number: ATmega48 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega48 Automotive

• Flash (kbytes): 4 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 256
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25. Memory Programming
25.1
278
Program And Data Memory Lock Bits
ATmega48/88/168 Automotive
Table 24-11. Explanation of Different Variables used in
Note:
The ATmega88/168 provides six Lock bits which can be left unprogrammed (“1”) or can be pro-
grammed (“0”) to obtain the additional features listed in
erased to “1” with the Chip Erase command.The ATmega48 has no separate Boot Loader sec-
tion. The SPM instruction is enabled for the whole Flash if the SELFPRGEN fuse is programmed
(“0”), otherwise it is disabled.
Table 25-1.
Notes:
Variable
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
BLB12
BLB11
BLB02
BLB01
LB2
LB1
Lock Bit Byte
()
()
()
()
1. Z15:Z14: always ignored
1. “1” means unprogrammed, “0” means programmed
2. Only on ATmega88/168.
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
Z-pointer during Self-Programming.
Z-pointer, ATmega168
Lock Bit Byte
“Addressing the Flash During Self-Programming” on page 269
PC[12:6]
PC[5:0]
5
(1)
Corresponding
Bit No
Z-value
7
6
5
4
3
2
1
0
Z13:Z7
Z6:Z1
Z13
Z6
(1)
Description
–
–
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
Description
Most significant bit which is used to address
the words within one page (64 words in a page
requires 6 bits PC [5:0])
Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1.
Program counter page address: Page select, for
page erase and page write
Program counter word address: Word select, for
filling temporary buffer (must be zero during page
write operation)
Figure 24-3
Table
25-2. The Lock bits can only be
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
and the Mapping to the
for details about the use of
7530I–AVR–02/10