ATmega48 Automotive Atmel Corporation, ATmega48 Automotive Datasheet - Page 87
ATmega48 Automotive
Manufacturer Part Number
ATmega48 Automotive
Description
Manufacturer
Atmel Corporation
Specifications of ATmega48 Automotive
Flash (kbytes)
4 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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13.9.2
7701E–AVR–02/11
TCCR0B – Timer/Counter Control Register B
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to logical zero
when TCCR0B is written when operating in PWM mode. When writing a logical one to the
FOC0A bit, an immediate compare match is forced on the waveform generation unit. The
OC0A output is changed according to its COM0A1:0 bit settings. Note that the FOC0A bit is
implemented as a strobe. Therefore, it is the value present in the COM0A1:0 bits that deter-
mines the effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to logical zero
when TCCR0B is written when operating in PWM mode. When writing a logical one to the
FOC0B bit, an immediate compare match is forced on the waveform generation unit. The
OC0B output is changed according to its COM0B1:0 bit settings. Note that the FOC0B bit is
implemented as a strobe. Therefore, it is the value present in the COM0B1:0 bits that deter-
mines the effect of the forced compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0B as TOP.
The FOC0B bit is always read as zero.
• Bits 5:4 – Res: Reserved Bits
These bits are reserved bits in the ATtiny24/44/84, and will always read as zero.
• Bit 3 – WGM02: Waveform Generation Mode
See the description in the
• Bits 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Bit
0x33 (0x53)
Read/Write
Initial Value
FOC0A
W
7
0
FOC0B
W
“TCCR0A – Timer/Counter Control Register A” on page
6
0
Atmel ATtiny24/44/84 [Preliminary]
R
5
–
0
R
4
–
0
WGM02
R/W
3
0
CS02
R/W
2
0
CS01
R/W
1
0
CS00
R/W
0
0
84.
TCCR0B
87
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