AD6649 Analog Devices, AD6649 Datasheet - Page 34
![no-image](/images/manufacturer_photos/0/0/56/analog_devices_sml.jpg)
AD6649
Manufacturer Part Number
AD6649
Description
IF Diversity Receiver
Manufacturer
Analog Devices
Datasheet
1.AD6649.pdf
(40 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD6649BCPZ
Manufacturer:
ADI
Quantity:
275
Part Number:
AD6649BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD6649BCPZRL7
Manufacturer:
ADI
Quantity:
1 250
AD6649
Addr
(Hex)
0x1F
0x20
0x24
0x25
0x3A
Digital Feature Control Registers
0x40
0x41
0x42
0x45
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x50
Register
Name
User Test
Pattern 4 LSB
(global)
User Test
Pattern 4 MSB
(global)
BIST signature
LSB (local)
BIST signature
MSB (local)
Sync control
(global)
DC correction
control
(local)
DC Correction
Value 0 (local)
DC Correction
Value 1 (local)
Fast detect
control (local)
Fast Detect
Upper
Threshold 0
(local)
Fast Detect
Upper
Threshold 1
(local)
Fast Detect
Lower
Threshold 0
(local)
Fast Detect
Lower
Threshold 1
(local)
Fast Detect
Dwell Time 0
(local)
Fast Detect
Dwell Time 1
(local)
Filter control
(local)
Bit 7
(MSB)
Open
Open
Open
Open
Open
1
Bit 6
Open
DC
correction
freeze
Open
Open
Open
Reserved
Bit 5
Open
Open
1
Open
Open
Fast detect upper threshold[7:0]
Fast detect lower threshold[7:0]
Fast detect dwell time[7:0]
Fast detect dwell time[15:8]
DC correction bandwidth select
0000 = 2387.32 Hz
0001 = 1193.66 Hz
0010 = 596.83 Hz
0011 = 298.42 Hz
0100 = 149.21 Hz
0101 = 74.60 Hz
0110 = 37.30 Hz
0111 = 18.65 Hz
1000 = 9.33 Hz
1001 = 4.66 Hz
1010 = 2.33 Hz
1011 = 1.17 Hz
1100 = 0.58 Hz
1101 = 0.29 Hz
1110 = reserved
1111 = reserved
Bit 4
Open
Open
FIR mode
0 = high
perfor-
mance
1 = low
latency
Fast detect upper threshold[12:8]
DC correction value[15:8]
User Test Pattern 4[15:8]
DC correction value[7:0]
User Test Pattern 4[7:0]
Rev. A | Page 34 of 40
BIST signature[15:8]
BIST signature[7:0]
Bit 3
Open
Force FD
output
enable
Output
gain
0 = 0 dB
1 = −6 dB
Fast detect lower threshold[12:8]
Bit 2
Clock
divider
next sync
only
Force FD
output
value
9-bit
output
mode
enable
Bit 1
Clock
divider
sync
enable
DC
correction
enable
Reserved
Datapath gain
00 = 0 dB
01 = −6 dB
10 = −12 dB
11 = −18 dB
Bit 0
(LSB)
Enable fast
detect output
Master sync
buffer enable
Open
0x00
Default
Value
(Hex)
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xB0
Data Sheet
Default
Notes/
Comments
Read only.
Read only.
Read only.
Read only.