AD9600 Analog Devices, AD9600 Datasheet - Page 16

• Manufacturer Part Number: AD9600
• Description: 10-Bit, 105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9600

• Resolution (bits): 10bit
• # Chan: 2
• Sample Rate: 150MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p,1 V p-p,2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD9600
Pin No.
ADC Fast Detect Outputs
Digital Inputs
Digital Outputs
SPI Control
Signal Monitor Port
Do Not Connect
54
53
56
55
59
58
61
60
52
9
8
13
12
15
14
17
16
19
18
23
22
26
25
28
27
30
29
32
31
11
10
48
47
51
33
35
34
2 to 7, 62, 63
Mnemonic
FD0+
FD0−
FD1+
FD1−
FD2+
FD2−
FD3+
FD3−
SYNC
D0+
D0−
D1+
D1−
D2+
D2−
D3+
D3−
D4+
D4−
D5+
D5−
D6+
D6−
D7+
D7−
D8+
D8−
D9+
D9−
DCO+
DCO−
SCLK/DFS
SDIO/DCS
CSB
SMI SDO/OEB
SMI SDFS
SMI SCLK/PDWN
DNC
Type
Output
Output
Output
Output
Output
Output
Output
Output
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
I/O
Input
I/O
Output
I/O
N/A
Description
Channel A/Channel B LVDS Fast Detect Indicator 0 True (see Table 14 for full details).
Channel A/Channel B LVDS Fast Detect Indicator 0 Complement (see Table 14
for details).
Channel A/Channel B LVDS Fast Detect Indicator 1 True (see Table 14 for details).
Channel A/Channel B LVDS Fast Detect Indicator 1 Complement (see Table 14
for details).
Channel A/Channel B LVDS Fast Detect Indicator 2 True (see Table 14 for details).
Channel A/Channel B LVDS Fast Detect Indicator 2 Complement (see Table 14
for details).
Channel A/Channel B LVDS Fast Detect Indicator 3 True (see Table 14 for details).
Channel A/Channel B LVDS Fast Detect Indicator 3 Complement (see Table 14
for details).
Digital Synchronization Pin (Slave Mode Only).
Channel A/Channel B LVDS Output Data 0 True.
Channel A/Channel B LVDS Output Data 0 Complement.
Channel A/Channel B LVDS Output Data 1 True.
Channel A/Channel B LVDS Output Data 1 Complement.
Channel A/Channel B LVDS Output Data 2 True.
Channel A/Channel B LVDS Output Data 2 Complement.
Channel A/Channel B LVDS Output Data 3 True.
Channel A/Channel B LVDS Output Data 3 Complement.
Channel A/Channel B LVDS Output Data 4 True.
Channel A/Channel B LVDS Output Data 4 Complement.
Channel A/Channel B LVDS Output Data 5 True.
Channel A/Channel B LVDS Output Data 5 Complement.
Channel A/Channel B LVDS Output Data 6 True.
Channel A/Channel B LVDS Output Data 6 Complement.
Channel A/Channel B LVDS Output Data 7 True.
Channel A/Channel B LVDS Output Data 7 Complement.
Channel A/Channel B LVDS Output Data 8 True.
Channel A/Channel B LVDS Output Data 8 Complement.
Channel A/Channel B LVDS Output Data 9 True.
Channel A/Channel B LVDS Output Data 9 Complement.
Channel A/Channel B LVDS Data Clock Output True.
Channel A/Channel B LVDS Data Clock Output Complement.
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data Input and Output/Duty Cycle Stabilizer in External Pin Mode.
SPI Chip Select (Active Low).
Signal Monitor Serial Data Output/Output Enable Input (Active Low) in
External Pin Mode.
Signal Monitor Serial Data Frame Sync.
Signal Monitor Serial Clock Output/Power-Down Input in External Pin Mode.
Do Not Connect.
Rev. B | Page 16 of 72