AD9601 Analog Devices, AD9601 Datasheet - Page 5

• Manufacturer Part Number: AD9601
• Description: 10-Bit, 200 MSPS/250 MSPS 1.8 V Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9601

• Resolution (bits): 10bit
• # Chan: 1
• Sample Rate: 250MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: 1 V p-p,1.25 V p-p,1.5 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, T
Table 3.
Parameter
CLOCK INPUTS
LOGIC INPUTS
LOGIC OUTPUTS
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed.
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Voltage (V
Low Level Input Voltage (V
Input Resistance (Differential)
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Input Current (SDIO)
Logic 0 Input Current (SDIO)
Logic 1 Input Current
Logic 0 Input Current
Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Output Coding
(SCLK, PDWN, CSB, RESET)
(SCLK, PDWN, CSB, RESET)
1
IL
IH
)
)
MIN
= −40°C, T
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
Full
Full
MAX
Min
0.2
AVDD − 0.3
1.1
1.2
0
16
0.8 × VDD
DRVDD − 0.05
= +85°C, f
CMOS/LVDS/LVPECL
AD9601-200
Rev. 0 | Page 5 of 32
Twos complement, Gray code, or offset binary (default)
IN
Typ
1.2
20
4
0
−60
55
0
4
GND + 0.05
= −1.0 dBFS, full scale = 1.25 V, DCS enabled, unless otherwise noted.
Max
6
AVDD + 1.6
AVDD
3.6
0.8
24
0.2 × AVDD
Min
0.2
AVDD − 0.3
1.1
1.2
0
16
0.8 × VDD
DRVDD − 0.05
CMOS/LVDS/LVPECL
AD9601-250
Typ
4
0
−60
50
0
4
GND + 0.05
1.2
20
Max
6
AVDD + 1.6
3.6
0.8
0.2 × AVDD
AVDD
24
AD9601
Unit
V
V p-p
V
V
V
V
kΩ
pF
V
V
μA
μA
μA
μA
pF
V
V