AD9627-11 Analog Devices, AD9627-11 Datasheet - Page 37

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AD9627-11

Manufacturer Part Number
AD9627-11
Description
11-Bit, 105 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9627-11

Resolution (bits)
11bit
# Chan
2
Sample Rate
150MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p,1 V p-p,2 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP
CHANNEL/CHIP SYNCHRONIZATION
The AD9627-11 has a SYNC input that offers the user flexible
synchronization options for synchronizing the internal blocks.
The clock divider sync feature is useful for guaranteeing synchro-
nized sample clocks across multiple ADCs. The signal monitor
block can also be synchronized using the SYNC input, allowing
properties of the input signal to be measured during a specific time
period. The input clock divider can be enabled to synchronize on a
single occurrence of the SYNC signal or on every occurrence. The
signal monitor block is synchronized on every SYNC input signal.
Rev. B | Page 37 of 72
The SYNC input is internally synchronized to the sample clock;
however, to ensure there is no timing uncertainty between multiple
parts, the SYNC input signal should be externally synchronized to
the input clock signal, meeting the setup and hold times shown
in Table 5. The SYNC input should be driven using a single-
ended CMOS-type signal.
AD9627-11

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