AD7366 Analog Devices, AD7366 Datasheet
AD7366
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AD7366 Summary of contents
Page 1
... V range, and range. The AD7366/AD7367 have an on-chip 2.5 V reference that can be disabled to allow the use of an external reference reference is applied to the D A and D CAP AD7366/AD7367 can accept a true bipolar ±12 V analog input. Minimum ± and V supplies are required for the DD SS ± ...
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... Initial Version Typical Connection Diagram ................................................... 18 Driver Amplifier Choice ........................................................... 19 Reference ..................................................................................... 19 Modes of Operation ....................................................................... 20 Normal Mode .............................................................................. 20 Shutdown Mode ......................................................................... 21 Power-Up Times ......................................................................... 21 Serial Interface ................................................................................ 22 Microprocessor Interfacing ........................................................... 24 AD7366/AD7367 to ADSP-218x .............................................. 24 AD7366/AD7367 to ADSP-BF53x ........................................... 24 AD7366/AD7367 to TMS320VC5506 ..................................... 25 AD7366/AD7367 to DSP563xx ................................................ 25 Application Hints ........................................................................... 27 Layout and Grounding .............................................................. 27 Outline Dimensions ....................................................................... 28 Ordering Guide .......................................................................... 28 Rev Page ...
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... 2.5 V internal/external −40°C to +85°C, unless otherwise noted. REF A Table 2. AD7366 Parameter DYNAMIC PERFORMANCE Signal-to-Noise Ratio (SNR) 1 Signal-to-Noise + Distortion Ratio (SINAD) 1 Total Harmonic Distortion (THD) Spurious-Free Dynamic Range (SFDR) 1 Intermodulation Distortion (IMD) ...
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... AD7366/AD7367 Parameter REFERENCE INPUT/OUTPUT Reference Output Voltage 3 Long-Term Stability Output Voltage Hysteresis 1 Reference Input Voltage Range DC Leakage Current Input Capacitance Output Impedance CAP CAP Reference Temperature Coefficient V Noise REF LOGIC INPUTS Input High Voltage, V INH Input Low Voltage, V INL ...
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... MΩ 125 kΩ 1.2 MΩ Rev Page AD7366/AD7367 = 2 5. MSPS, f DRIVE S SCLK Test Conditions/Comments kHz sine wave kHz kHz @ 3 dB, ±10 V range @ 0.1 dB, ±10 V range Guaranteed no missed codes to 14 bits ±5 V and ±10 V analog input range ...
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... AD7366/AD7367 Parameter REFERENCE INPUT/OUTPUT Reference Output Voltage 3 Long-Term Stability Output Voltage Hysteresis 1 Reference Input Voltage Range DC Leakage Current Input Capacitance Output Impedance CAP CAP Reference Temperature Coefficient V Noise REF LOGIC INPUTS Input High Voltage, V INH Input Low Voltage, V INL ...
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... SCLK ns max CS rising edge to D µs max Power-up time from shutdown mode; time required between CNVST rising edge and CNVST falling edge = t R Rev Page AD7366/AD7367 = 2 5. −40°C to +85°C, DRIVE A OUT B) are three-state disabled OUT high impedance ...
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... AD7366/AD7367 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter V to AGND, DGND AGND, DGND DGND DRIVE AGND, DGND DGND AGND DRIVE AGND to DGND Analog Input Voltage to AGND Digital Input Voltage to DGND Digital Output Voltage to GND ...
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... AD7367. The data simultaneously appears on both pins from the simultaneous con- versions of both ADCs. The data stream consists of the 12 bits of conversion data for the AD7366 and 14 bits for the AD7367 and is provided MSB first held low for a further 14 SCLK cycles, on either D data from the other ADC follows on that D by two zeros ...
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... Internal/External Reference Selection, Logic Input. If this pin is tied to logic high, the on-chip 2.5 V reference is used as the reference source for both ADC A and ADC B. In addition, Pin D decoupling capacitors. If the REFSEL pin is tied to GND, an external reference can be supplied to the AD7366/ AD7367 through the D ...
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... 15V –15V DRIVE f = 1MSPS, = 50kHz IN 350 400 450 500 Rev Page AD7366/AD7367 – 10V RANGE –78 –80 ±5V RANGE – 5V – 15V INTERNAL REFERENCE –86 10 100 ANALOG INPUT FREQUENCY (kHz) Figure 6. THD vs. Analog Input Frequency ...
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... AD7366/AD7367 –70 –75 –80 ±5V RANGE –85 –90 –95 –100 –105 INTERNAL REFERENCE –110 0 100 200 300 FREQUENCY OF INPUT NOISE (kHz) Figure 9. Channel-to-Channel Isolation 110000 106091 CODES 31 CODES 100000 90000 80000 70000 60000 50000 40000 30000 20000 10000 0 8191 8192 ...
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... TO 10V RANGE 15V –15V DRIVE f = 1MSPS S INTERNAL REFERENCE 55 ±5V RANGE 45 35 ±10V RANGE 25 15 100 200 300 400 500 600 700 800 SAMPLING FREQUENCY (kSPS) Figure 15. Power vs. Sampling Frequency in Normal Mode 900 1000 Rev Page AD7366/AD7367 ...
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... The figure given is the typical value across all four channels for the AD7366/AD7367 (see Figure 9 for more information). Intermodulation Distortion (IMD) ...
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... It is expressed in ppm using the following equation REF = V ( ppm ) HYS where: V (25° 25°C. REF REF V (T_HYS) is the maximum change of V REF or T_HYS−. Rev Page AD7366/AD7367 ° − HYS ) REF × ° REF ...
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... These supplies must be equal to or greater than ±11.5 V. See Table 7 for the minimum requirements on these supplies for each analog input range. The AD7366/AD7367 require a low voltage 4. 5. supply to power the ADC core. Table 7. Reference and Supply Requirements for Each ...
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... The track-and-hold enters its tracking mode when the BUSY signal goes low after the CS falling edge. The time required to acquire an input signal depends on how quickly the sampling capacitor is charged. With zero source impedance, 140 ns is suffi- cient to acquire the signal to the 12-bit level for the AD7366 and and the 14-bit level for the AD7367 ...
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... The analog inputs on the AD7366/AD7367 accept bipolar single- ended signals. The AD7366/AD7367 can operate with either an internal or an external reference. In Figure 20, the AD7366/ AD7367 are configured to operate with the internal 2.5 V reference. A 680 nF decoupling capacitor is required when operating with the internal reference ...
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... AD7366 or 1 MSPS for the AD7367 equal to 4.75 V (see Table 2 and Table 3). The maximum throughput rate with the V and greater than 2 MSPS for the AD7366 and 900 kSPS for the AD7367. REFERENCE The AD7366/AD7367 can operate with either the internal 2.5 V on-chip reference or an externally applied reference ...
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... CS is brought high OUT CS is left low for an additional 12 SCLK cycles for the AD7366 or 14 SCLK cycles for the AD7367, the result from the other on-chip ADC is also accessed on the same D and Figure 28 (see the Serial Interface section). ...
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... OUT low as described in the Serial Interface section. The D return to three-state when CS is brought back to logic high. To exit full power-down and to power up the AD7366/AD7367, a rising edge of CNVST is required. After the required power-up time has elapsed, CNVST can be brought low again to initiate another conversion, as shown in Figure 24 (see the Power-Up Times section for power-up times associated with the AD7366/ AD7367) ...
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... CS takes the bus out of three-state and clocks out the MSB of the conversion result. The data stream consists of 12 bits of data for the AD7366 and 14 bits of data for the AD7367, MSB first. The first bit of the conversion result is valid on the first SCLK falling edge after the CS falling edge. ...
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... A STATE Figure 28. Reading Data from Both ADCs on One DB1 DB0 Line with 26 SCLKs for the AD7366 OUT DB1 DB0 DB13 DB12 Line with 28 SCLKs for the AD7367 OUT Rev ...
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... The ADSP-218x family of DSPs interfaces directly to the AD7366/AD7367 without any glue logic required. The V pin of the AD7366/AD7367 takes the same supply voltage as the power supply pin of the ADSP-218x. This allows the ADC to operate at a higher supply voltage than its serial interface and therefore, the ADSP-218x, if necessary ...
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... AD7366/AD7367 TO DSP563xx The connection diagram in Figure 32 shows how the AD7366/ AD7367 can be connected to the enhanced synchronous serial interface (ESSI) of the DSP563xx family of DSPs from Motorola. There are two on-board ESSIs, and each is operated in synchro- ...
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... ADC to operate at a higher voltage than its serial interface and, therefore, the DSP563xx, if necessary. AD7366/ AD7367* SCLK D A OUT D B OUT CS BUSY CNVST V DRIVE *ADDITIONAL PINS OMITTED FOR CLARITY. Figure 32. Interfacing the AD7366/AD7367 to the DSP563xx Rev Page DSP563xx* SCK0 SCK1 SRD0 SRD1 SC02 SC12 IRQ ...
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... However, the analog ground plane should be allowed to run under the AD7366/ AD7367 to avoid noise coupling. The power supply lines to the AD7366/AD7367 should use as large a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. ...
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... AD7367BRUZ −40°C to +85°C AD7367BRUZ-500RL7 −40°C to +85°C AD7367BRUZ-RL7 −40°C to +85°C EVAL-AD7366CBZ EVAL-AD7367CBZ EVAL-CONTROL BRD2 RoHS Compliant Part. ©2007-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...