AD9219 Analog Devices, AD9219 Datasheet - Page 11

• Manufacturer Part Number: AD9219
• Description: Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9219

• Resolution (bits): 10bit
• # Chan: 4
• Sample Rate: 65MSPS
• Interface: LVDS,Ser
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p,2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 7. Pin Function Descriptions
Pin No.
0
1, 2, 5, 6, 9, 10, 27, 32,
35, 36, 39, 45, 46
11, 26
12, 25
3
4
7
8
13
14
15
16
17
18
19
20
21
22
23
24
28
29
Mnemonic
AGND
AVDD
DRGND
DRVDD
VIN − D
VIN + D
CLK−
CLK+
D − D
D + D
D − C
D + C
D − B
D + B
D − A
D + A
FCO−
FCO+
DCO−
DCO+
SCLK/DTP
SDIO/ODM
DRGND
DRVDD
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO ANALOG GROUND.
VIN – D
VIN + D
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
CLK+
CLK–
10
11
12
1
2
3
4
5
6
7
8
9
Figure 5. 48-Lead LFCSP Pin Configuration, Top View
PIN 1
INDICATOR
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
Description
Analog Ground (Exposed Paddle)
1.8 V Analog Supply
Digital Output Driver Ground
1.8 V Digital Output Driver Supply
ADC D Analog Input Complement
ADC D Analog Input True
Input Clock Complement
Input Clock True
ADC D Digital Output Complement
ADC D Digital Output True
ADC C Digital Output Complement
ADC C Digital Output True
ADC B Digital Output Complement
ADC B Digital Output True
ADC A Digital Output Complement
ADC A Digital Output True
Frame Clock Output Complement
Frame Clock Output True
Data Clock Output Complement
Data Clock Output True
Serial Clock/Digital Test Pattern
Serial Data IO/Output Driver Mode
Rev. E | Page 11 of 56
AD9219
TOP VIEW
36
35
34
33
32
31
30
29
28
27
26
25
AVDD
AVDD
VIN – A
VIN + A
AVDD
PDWN
CSB
SDIO/ODM
SCLK/DTP
AVDD
DRGND
DRVDD
AD9219