AD7946 Analog Devices, AD7946 Datasheet - Page 13

• Manufacturer Part Number: AD7946
• Manufacturer: Analog Devices

Specifications of AD7946

• Resolution (bits): 14bit
• # Chan: 1
• Sample Rate: 500kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p
• Adc Architecture: SAR
• Pkg Type: CSP,SOP

TYPICAL CONNECTION DIAGRAM
Figure 25 shows an example of the recommended connection diagram for the AD7946 when multiple supplies are available.
ANALOG INPUT
Figure 26 shows an equivalent circuit of the input structure of
the AD7946.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs IN+ and IN−. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 0.3 V because this causes these diodes to begin to forward-
bias and start conducting current. These diodes can handle a
maximum forward-biased current of 130 mA. For instance,
these conditions could eventually occur when the input buffer’s
(U1) supplies are different from VDD. In such a case, an input
buffer with a short-circuit current limitation can be used to
protect the part.
The analog input structure allows the sampling of the
differential signal between IN+ and IN−. By using this
differential input, small signals common to both inputs are
rejected, as shown in Figure 27, which represents the typical
CMRR over frequency. For instance, by using IN− to sense a
remote signal ground, ground potential differences between the
sensor and the local ADC ground are eliminated.
OR IN–
GND
IN+
Figure 26. Equivalent Analog Input Circuit
C
PIN
NOTES
1. SEE REFERENCE SECTION FOR REFERENCE SELECTION.
2. C
3. SEE DRIVER AMPLIFIER CHOICE SECTION.
4. OPTIONAL FILTER. SEE ANALOG INPUT SECTION.
5. SEE DIGITAL INTERFACE FOR MOST CONVENIENT INTERFACE MODE.
VDD
0V TO REF
(ADA4841
OR NOTE 3)
REF
D1
D2
IS USUALLY A 10µF CERAMIC CAPACITOR (X5R).
V+
V–
V+
R
Figure 25. Typical Application Diagram with Multiple Supplies
IN
(NOTE 1)
REF
(NOTE 4)
2.7nF
33Ω
C
(NOTE 2)
IN
10µF
IN+
IN–
Rev. A | Page 13 of 24
GND
REF
AD7946
VDD
During the acquisition phase, the impedance of the analog
inputs (IN+ or IN−) can be modeled as a parallel combination
of capacitor, C
tion of R
typically 600 Ω and is a lumped component made up of some
serial resistors and the on resistance of the switches. C
typically 30 pF and is mainly the ADC sampling capacitor.
During the conversion phase, when the switches are opened, the
input impedance is limited to C
low-pass filter, which reduces undesirable aliasing effects and
limits the noise.
When the source impedance of the driving circuit is low, the
AD7946 can be driven directly. Large source impedances
significantly affect the ac performance, especially total
harmonic distortion (THD). The dc performances are less
sensitive to the input impedance. The maximum source
impedance depends on the amount of THD that can be
VIO
SDO
SCK
CNV
SDI
70
60
50
40
IN
1
and C
100nF
100nF
Figure 27. Analog Input CMRR vs. Frequency
PIN
, and the network formed by the series connec-
IN
. C
3- OR 4-WIRE INTERFACE
(NOTE 5)
5V
1.8V TO VDD
PIN
10
VDD = 5V
is primarily the pin capacitance. R
FREQUENCY (kHz)
PIN
100
. R
IN
and C
IN
1k
make a 1-pole,
AD7946
IN
is
10k
IN
is