AD7265 Analog Devices, AD7265 Datasheet - Page 16

• Manufacturer Part Number: AD7265
• Description: Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7265

• Resolution (bits): 12bit
• # Chan: 12
• Sample Rate: 1MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: CSP,QFP

AD7265
Using an Op Amp Pair
An op amp pair can be used to directly couple a differential
signal to one of the analog input pairs of the AD7265. The
circuit configurations illustrated in
show how a dual op amp can be used to convert a single-ended
signal into a differential signal for both a bipolar and unipolar
input signal, respectively.
The voltage applied to Point A sets up the common-mode
voltage. In both diagrams, it is connected in some way to the
reference, but any value in the common-mode range can be
input here to set up the common mode. The
suitable dual op amp that can be used in this configuration to
provide differential drive to the AD7265.
Take care when choosing the op amp; the selection depends on
the required power supply and system performance objectives.
The driver circuits in Figure 26 and Figure 27 are optimized for
dc coupling applications requiring best distortion performance.
The circuit configuration shown in Figure 26 converts a
unipolar, single-ended signal into a differential signal.
The differential op amp driver circuit shown in Figure 27 is
configured to convert and level shift a single-ended, ground-
referenced (bipolar) signal to a differential signal centered at the
V
V
GND
GND
REF
Figure 26. Dual Op Amp Circuit to Convert a Single-Ended Unipolar Signal
REF
Figure 27. Dual Op Amp Circuit to Convert a Single-Ended Bipolar Signal
level of the ADC.
2 × V
2 × V
REF
REF
220kΩ
p-p
p-p
440Ω
440Ω
20kΩ
A
A
into a Differential Unipolar Signal
into a Differential Signal
220Ω
220Ω
220Ω
220Ω
220Ω
220Ω
V+
V–
V+
V–
V+
V–
V+
V–
1
1
10kΩ
ADDITIONAL PINS OMITTED FOR CLARITY.
10kΩ
ADDITIONAL PINS OMITTED FOR CLARITY.
27Ω
27Ω
27Ω
27Ω
Figure 26 and Figure 27
3.75V
3.75V
3.75V
2.5V
1.25V
3.75V
2.5V
1.25V
2.5V
1.25V
2.5V
1.25V
AD8022
V
V
V
V
IN+
IN–
IN+
IN–
D
D
is a
CAP
AD7265
CAP
AD7265
A/D
A/D
CAP
0.47µF
CAP
0.47µF
Rev. A | Page 16 of 28
1
1
B
B
Pseudo Differential Mode
The AD7265 can have a total of six pseudo differential pairs. In
this mode, V
an amplitude of V
chosen) to make use of the full dynamic range of the part. A dc
input is applied to the V
provides an offset from ground or a pseudo ground for the V
input. The benefit of pseudo differential inputs is that they
separate the analog input signal ground from the ADC’s ground
allowing dc common-mode voltages to be cancelled. The typical
voltage range for the V
mode, is shown in Figure 28 and Figure 29. Figure 30 shows a
connection diagram for pseudo differential mode.
–0.2
–0.4
–0.5
1.0
0.8
0.6
0.4
0.2
2.5
2.0
1.5
1.0
0.5
Figure 30. Pseudo Differential Mode Connection Diagram
0
0
V
0
0
p–p
REF
T
A
= 25°C
IN+
0.5
Figure 28. V
Figure 29. V
Pseudo Differential Mode with V
Pseudo Differential Mode with V
is connected to the signal source that must have
0.5
1.0
REF
(or 2 × V
1
1.5
ADDITIONAL PINS OMITTED FOR CLARITY.
IN−
IN−
IN−
1.0
IN−
DC INPUT
VOLTAGE
Input Voltage Range vs. V
Input Voltage Range vs. V
pin, while in pseudo differential
2.0
pin. The voltage applied to this input
V
V
REF
REF
REF
1.5
2.5
, depending on the range
(V)
(V)
3.0
2.0
V
V
IN+
IN–
3.5
V
REF
DD
DD
0.47µF
AD7265
4.0
= 3 V
= 5 V
2.5
T
REF
REF
A
4.5
= 25°C
in
in
1
3.0
5.0
IN+