AD9444 Analog Devices, AD9444 Datasheet - Page 8

• Manufacturer Part Number: AD9444
• Description: 14-Bit, 80 MSPS A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9444

• Resolution (bits): 14bit
• # Chan: 1
• Sample Rate: 80MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p,1 V p-p,2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: QFP

AD9444
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
ELECTRICAL
ENVIRONMENTAL
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features proprie-
tary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
AVDD1
AVDD2
DRVDD
AGND
AVDD1
AVDD2
AVDD2
D0 to D13
CLK, MODE
VIN+, VIN−
VREF
SENSE
REFT, REFB
Storage Temperature
Operating Temperature Range
Lead Temperature Range
Junction Temperature
(Soldering 10 sec)
With
Respect to
AGND
AGND
DGND
DGND
DRVDD
DRVDD
AVDD1
DGND
AGND
AGND
AGND
AGND
AGND
Min
−0.3
−0.3
−0.3
−0.3
−4
−4
−4
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–65
–40
Max
+4
+6
+4
+0.3
+4
+6
+6
DRVDD + 0.3
AVDD1 + 0.3
AVDD2 + 0.3
AVDD1 + 0.3
AVDD1 + 0.3
AVDD1 + 0.3
+125
+85
300
150
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
°C
°C
Rev. 0 | Page 8 of 40
Thermal Resistance
The heat sink of the AD9444 package must be soldered to
ground.
Table 6.
Package Type
100-Lead TQFP/EP
Typical θ
board in still air.
Typical θ
in still air.
Typical θ
the thermal resistance through heat-sink path.
Airflow increases heat dissipation effectively reducing θ
more metal directly in contact with the package leads, from
metal traces, through holes, ground, and power planes, reduces
the θ
the ground plane.
JA
. It is required that the exposed heat sink be soldered to
JA
JB
JC
= 8.3°C/W (heat-sink soldered) for multilayer board
= 19.8°C/W (heat-sink soldered) for multilayer
= 2°C/W (junction to exposed heat sink) represents
θ
19.8
JA
θ
8.3
JB
θ
2
JC
Unit
°C/W
JA
. Also,