AD9481 Analog Devices, AD9481 Datasheet - Page 13

• Manufacturer Part Number: AD9481
• Description: 8-Bit, 250 MSPS, 3.3 V A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9481

• Resolution (bits): 8bit
• # Chan: 1
• Sample Rate: 250MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p,1 V p-p
• Adc Architecture: Pipelined
• Pkg Type: QFP

–10
–20
–30
–40
–50
–60
–70
–80
–90
Figure 11. SFDR vs. A
75
70
65
60
55
50
45
40
80
70
60
50
40
30
20
10
Figure 10. SNR, SINAD, SFDR vs. Sample Clock Frequency,
0
0
–70
0
0
F1, F2 = –7dBFS
2F2–F1 = –65.9dBc
2F1–F2 = –64.9dBc
Figure 12. Two-Tone Intermodulation Distortion
(69.3 MHz and 70.3 MHz; f
–60
20
50
ANALOG INPUT DRIVE LEVEL (dBFS)
–50
A
IN
IN
40
100
SAMPLE CLOCK (MHz)
= 70 MHz @ −1 dB
Input Level; A
SFDR (dBc)
SFDR
SINAD
SNR
–40
60dB
REFERENCE LINE
(MHz)
60
150
–30
IN
S
= 250 MSPS)
= 70 MHz @ 250 MSPS
SFDR (dBFS)
80
200
–20
100
250
–10
120
300
0
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Figure 15. SNR, SINAD, and SFDR vs. VREF in External Reference Mode, A
50.0
47.5
45.0
42.5
40.0
140
120
100
0.5
80
60
40
20
50
49
48
47
46
45
44
43
42
41
40
0
20
0
Figure 13. I
Figure 14. SNR, SINAD vs. Clock Pulse-Width High,
A
IN
0.7
DCS ON
= 70 MHz @ −1 dBFS, 250 MSPS, DCS On/Off
50
30
AVDD
70 MHz @ −1 dBFS, 250 MSPS
0.9
CLOCK POSITIVE DUTY CYCLE (%)
EXTERNAL VREF VOLTAGE (V)
A
and I
IN
SAMPLE CLOCK (MSPS)
= 70 MHz @ −1 dBFS
100
40
1.1
DRVDD
SNR
DCS OFF
vs. Clock Rate, C
150
50
1.3
SINAD
I
I
DRVDD
AVDD
1.5
200
60
SFDR
LOAD
1.7
= 5 pF
250
70
1.9
AD9481
300
80
75
70
65
60
55
IN
=