AD7922 Analog Devices, AD7922 Datasheet - Page 8

• Manufacturer Part Number: AD7922
• Description: 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 12-Bit A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7922

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 1MSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: Uni Vdd
• Adc Architecture: SAR
• Pkg Type: SOP,SOT

AD7912/AD7922
TIMING EXAMPLES
Figure 6 and Figure 7 show some of the timing parameters from
the Timing Specifications section.
Timing Example 1
As shown in Figure 7, when f
is 1 MSPS, the cycle time is
With t
requirement of 290 ns for t
In Figure 7, t
t
satisfying the minimum requirement of 30 ns.
10
= 30 ns maximum. This allows a value of 126 ns for t
t
2
2
+ 12.5(1/f
= 10 ns minimum, then t
ACQ
DOUT
SCLK
SCLK
is comprised of 2.5(1/f
SCLK
DIN
CS
CS
) + t
THREE-STATE
ACQ
t
ACQ
t
= 1 µs
2
2
X
Z
SCLK
1
.
1
t
ZERO
3
ACQ
= 18 MHz and the throughput
X
is 295 ns, which satisfies the
2
2
CHN
SCLK
t
CHN
8
) + t
3
3
MOD
10
12.5(1/f
STY
+ t
Figure 6. AD7922 Serial Interface Timing Diagram
t
4
4
9
QUIET
Figure 7. Serial Interface Timing Example
DB11
SCLK
t
t
6
4
, where
QUIET
t
)
X
t
CONVERT
CONVERT
5
5
t
DB10
7
,
Rev. 0 | Page 8 of 32
1/THROUGHPUT
X
13
13
B
Timing Example 2
The AD7922 can also operate with slower clock frequencies. As
shown in Figure 7, when f
is 315 kSPS, the cycle time is
With t
requirement of 290 ns for t
In Figure 7, t
t
satisfying the minimum requirement of 30 ns.
In this example, as with other slower clock values, the signal
might already be acquired before the conversion is complete,
but it is still necessary to leave 30 ns minimum t
conversions. In this example, the signal should be fully acquired
at approximately point C in Figure 7.
10
DB2
B
= 30 ns maximum. This allows a value of 134 ns for t
X
14
t
14
2
t
5
2
+ 12.5(1/f
= 10 ns minimum, then t
DB1
X
C
15
t
15
ACQ
10
DB0
is comprised of 2.5(1/f
SCLK
t
ACQUISITION
X
16
16
) + t
THREE-STATE
t
ACQ
10
SCLK
ACQ
= 3.17 µs
= 5 MHz and the throughput rate
.
t
t
QUIET
QUIET
ACQ
t
1
is 664 ns, which satisfies the
SCLK
) + t
10
QUIET
+ t
QUIET
between
, where
QUIET
,