AD7453 Analog Devices, AD7453 Datasheet - Page 12

• Manufacturer Part Number: AD7453
• Description: Pseudo Differential, 555 kSPS, 12-Bit A/D Converter in 8-Lead SOT-23
• Manufacturer: Analog Devices

Specifications of AD7453

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 555kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p
• Adc Architecture: SAR
• Pkg Type: SOT

AD7453
TYPICAL CONNECTION DIAGRAM
Figure 17 shows a typical connection diagram for the AD7453.
In this setup, the GND pin is connected to the analog ground
plane of the system. The V
2.5 V decoupled reference source. The signal source is connec-
ted to the V
is connected to the V
V
10 µF tantalum capacitor in parallel with a 0.1 µF ceramic
capacitor. The reference pin should be decoupled to AGND with
a capacitor of at least 0.1 µF. The conversion result is output in a
16-bit word with four leading zeros followed by the MSB of the
12-bit result.
THE ANALOG INPUT
The AD7453 has a pseudo differential analog input. The V
input is coupled to the signal source and must have an ampli-
tude of V
part. A dc input is applied to V
input provides an offset from ground or a pseudo ground for
the V
is that they separate the analog input signal ground from the
ADC’s ground, allowing dc common-mode voltages to be
cancelled.
Because the ADC operates from a single supply, it is necessary
to level shift ground-based bipolar signals to comply with the
input requirements. An op amp (for example, the AD8021) can
be configured to rescale and level shift a ground-based (bipolar)
signal so that it is compatible with the input range of the
AD7453. See Figure 18.
When a conversion takes place, the pseudo ground corresponds
to 0 and the maximum analog input corresponds to 4096.
P-TO-P
V
IN+
REF
input. The V
IN+
input. The main benefit of pseudo differential inputs
REF
IN+
p-p to make use of the full dynamic range of the
analog input via a unity gain buffer. A dc voltage
Figure 17. Typical Connection Diagram
DD
DC INPUT
VOLTAGE
pin should be decoupled to AGND with a
IN–
pin to provide a pseudo ground for the
REF
0.1µF
pin is connected to the AD780, a
IN–
V
V
IN+
IN–
V
V
. The voltage applied to this
REF
DD
0.1µF
AD7453
AD780
2.5V
SDATA
SCLK
GND
10µF
CS
INTERFACE
+2.7V TO +5.25V
SUPPLY
SERIAL
µC/µP
IN+
Rev. B | Page 12 of 20
Analog Input Structure
Figure 19 shows the equivalent circuit of the analog input struc-
ture of the AD7453. The four diodes provide ESD protection for
the analog inputs. Care must be taken to ensure that the analog
input signals never exceed the supply rails by more than
300 mV. This causes these diodes to become forward biased and
to start conducting into the substrate. These diodes can conduct
up to 10 mA without causing irreversible damage to the part.
The capacitors, C1 in Figure 19, are typically 4 pF and can be
attributed primarily to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about 100 Ω.
The capacitors C2 are the ADC’s sampling capacitors, and have
a typical capacitance of 16 pF.
For ac applications, removing high frequency components from
the analog input signal through the use of an RC low-pass filter
on the relevant analog input pins is recommended. In applica-
tions where harmonic distortion and signal-to-noise ratio are
critical, the analog input should be driven from a low imped-
ance source. Large source impedances significantly affect the ac
performance of the ADC, which may necessitate the use of an
input buffer amplifier. The choice of the op amp is a function of
the particular application.
Figure 18. Op Amp Configuration to Level Shift a Bipolar Input Signal
+1.25V
–1.25V
Conversion Phase—Switches Open; Track Phase—Switches Closed
V
V
IN+
IN–
0V
C1
C1
Figure 19. Equivalent Analog Input Circuit.
V
IN
3R
R
R
D
D
D
D
EXTERNAL
V
V
V
REF
DD
DD
(2.5V)
R
0.1µF
1.25V
2.5V
0V
R1
R1
V
V
IN+
IN–
AD7453
C2
C2
V
REF