AD7732 Analog Devices, AD7732 Datasheet - Page 11

• Manufacturer Part Number: AD7732
• Manufacturer: Analog Devices

Specifications of AD7732

• Resolution (bits): 24bit
• # Chan: 2
• Sample Rate: 3.05MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: Bip 10V,Bip 5.0V,Uni 10V,Uni 5.0V
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

Chopping Disabled
The second mode, in which the AD7732 is configured with
chopping disabled (CHOP = 0), provides faster conversion time
while still maintaining high resolution. Table 7 to Table 9 show
the –3 dB frequencies and typical performance versus the
channel conversion time and equivalent output data rate,
respectively. Table 7 shows the typical output rms noise. Table 8
shows the typical effective resolution based on the rms noise.
Table 9 shows the typical output peak-to-peak resolution,
Table 7. Typical Output RMS Noise in μV vs. Conversion Time and Input Range with Chopping Disabled
FW
Table 8. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled
FW
Table 9. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled
FW
127
127
127
92
44
35
16
92
44
35
16
92
44
35
16
8
3
8
3
8
3
Conversion Time
Conversion Time
Conversion Time
Register
Register
Register
5Ch
2Ch
5Ch
2Ch
23h
10h
08h
03h
7Fh
23h
10h
08h
03h
7Fh
5Ch
2Ch
23h
10h
08h
03h
7Fh
Conversion Time
Conversion Time
Conversion Time
1357
(μs)
(μs)
1357
(μs)
1357
992
492
398
200
117
992
492
398
200
117
992
492
398
200
117
65
65
65
Output Data Rate
Output Data Rate
Output Data Rate
15398
15398
15398
(Hz)
1008
2032
2511
4991
8545
(Hz)
(Hz)
1008
2032
2511
4991
8545
1008
2032
2511
4991
8545
737
737
737
Rev. A | Page 11 of 32
–3 dB Frequency
–3 dB Frequency
–3 dB Frequency
representing values for which there will be no code flicker
within a 6-sigma limit. The peak-to-peak resolutions are not
calculated based on rms noise but on peak-to-peak noise.
These typical numbers are generated from 4096 data samples
acquired in continuous conversion mode with an analog input
voltage set to 0 V and MCLK = 6.144 MHz. The conversion
time is selected via the channel conversion time register.
14000
14000
14000
1850
2290
2500
7780
1850
2290
2500
7780
(Hz)
(Hz)
1850
2290
2500
7780
(Hz)
670
920
670
920
670
920
Input Range/Peak-to-Peak Resolution (Bits)
±10 V
±10 V
20.5
20.3
19.7
19.5
19.0
18.4
17.2
17.6
17.4
16.8
16.6
16.1
15.5
14.3
Input Range/Effective Resolution (Bits)
0 V to +10 V
0 V to +10 V
19.5
19.3
18.7
18.5
18.0
17.4
16.2
16.6
16.4
15.8
15.6
15.1
14.5
13.3
RMS Noise
(μV)
13.2
15.5
22.7
26.3
39.0
57.0
132
±5 V
19.5
18.7
16.6
16.4
15.8
15.6
15.1
14.5
13.3
±5 V
19.3
18.5
18.0
17.4
16.2
AD7732
0 V to +5 V
0 V to +5 V
18.5
18.3
17.7
17.5
17.0
16.4
15.2
15.6
15.4
14.8
14.6
14.1
13.5
12.3