AD7928 Analog Devices, AD7928 Datasheet - Page 18

• Manufacturer Part Number: AD7928
• Description: 8-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 20-Lead TSSOP
• Manufacturer: Analog Devices

Specifications of AD7928

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 1MSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: SOP

AD7908/AD7918/AD7928
CIRCUIT INFORMATION
The AD7908/AD7918/AD7928 are high speed, 8-channel, 8-bit,
10-bit, and 12-bit, single-supply ADCs, respectively. The parts
can be operated from a 2.7 V to 5.25 V supply. When operated
from either a 5 V or 3 V supply, the AD7908/AD7918/AD7928
are capable of throughput rates of 1 MSPS when provided with
a 20 MHz clock.
The AD7908/AD7918/AD7928 provide the user with an on-
chip, track-and-hold ADC, and a serial interface housed in a
20-lead TSSOP package. The AD7908/AD7918/ AD7928 each
have eight single-ended input channels with a channel
sequencer, allowing the user to select a channel sequence that
the ADC can cycle through with each consecutive CS falling
edge. The serial clock input accesses data from the part, controls
the transfer of data written to the ADC, and provides the clock
source for the successive approximation ADC. The analog input
range for the AD7908/AD7918/ AD7928 is 0 V to REF
to 2 × REF
register. For the 0 to 2 × REF
from a 4.75 V to 5.25 V supply.
The AD7908/AD7918/AD7928 provide flexible power
management options to allow the user to achieve the best power
performance for a given throughput rate. These options are
selected by programming the PM1 and PM0 power
management bits in the control register.
CONVERTER OPERATION
The AD7908/AD7918/AD7928 are 8-, 10-, and 12-bit
successive approximation analog-to-digital converters based
around a capacitive DAC, respectively. The AD7908/AD7918/
AD7928 can convert analog input signals in the range 0 V to
CS
CS
CS
IN
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1, SELECT CODING, RANGE,
AND POWER MODE.
SELECT CHANNEL A2 TO A0
FOR CONVERSION.
SEQ = 1 SHADOW = 1
DOUT: CONVERSION RESULT FROM
CHANNEL 0.
CONTINUOUSLY CONVERTS ON A
CONSECUTIVE SEQUENCE OF
CHANNELS FROM CHANNEL 0 UP TO,
AND INCLUDING, THE PREVIOUSLY
SELECTED A2 TO A0 IN THE CONTROL
REGISTER.
CONTINUOUSLY CONVERTS ON THE
SELECTED SEQUENCE OF CHANNELS
BUT WILL ALLOW RANGE, CODING, AND
SO ON, TO CHANGE IN THE CONTROL
REGISTER WITHOUT INTERRUPTING
THE SEQUENCE, PROVIDED SEQ = 1
SHADOW = 0
Figure 13. SEQ Bit = 1, SHADOW Bit = 1 Flowchart
, depending on the status of Bit 1 in the control
DUMMY CONVERSION
DIN = ALL 1s
POWER-ON
IN
range, the part must be operated
WRITE BIT = 0
WRITE BIT = 1
SEQ = 1, SHADOW = 0
IN
or 0 V
Rev. D | Page 18 of 32
REF
simplified schematics of the ADC. The ADC is comprised of
control logic, SAR, and a capacitive DAC, which are used to add
and subtract fixed amounts of charge from the sampling
capacitor to bring the comparator back into a balanced
condition. Figure 14 shows the ADC during its acquisition
phase. SW2 is closed and SW1 is in Position A. The comparator
is held in a balanced condition and the sampling capacitor
acquires the signal on the selected V
When the ADC starts a conversion (see Figure 15), SW2 opens
and SW1 moves to Position B, causing the comparator to
become unbalanced. The control logic and the capacitive DAC
are used to add and subtract fixed amounts of charge from the
sampling capacitor to bring the comparator back into a
balanced condition. When the comparator is rebalanced, the
conversion is complete. The control logic generates the ADC
output code. Figure 17 and Figure 18 show the ADC transfer
functions.
Analog Input
Figure 16 shows an equivalent circuit of the analog input
structure of the AD7908/AD7918/AD7928. The two diodes (D1
and D2) provide ESD protection for the analog inputs. Care
must be taken to ensure that the analog input signal never
exceeds the supply rails by more than 300 mV. This causes these
diodes to become forward biased and start conducting current
into the substrate. 10 mA is the maximum current these diodes
can conduct without causing irreversible damage to the part.
The Capacitor C1 in Figure 16 is typically about 4 pF and can
primarily be attributed to pin capacitance. The Resistor R1 is a
lumped component made up of the on resistance of the track-
and-hold switch and also includes the on resistance of the input
multiplexer. The total resistance is typically about 400 Ω. The
Capacitor C2 is the ADC sampling capacitor and has a
capacitance of 30 pF typically. For ac applications, removing
high frequency components from the analog input signal is
recommended by use of an RC lowpass filter on the relevant
analog input pin. In applications where harmonic distortion
V
V
V
V
IN
IN
IN
IN
0
7
AGND
AGND
0
7
IN
or 0 V to 2 × REF
SW1
SW1
A
A
Figure 14. ADC Acquisition Phase
Figure 15. ADC Conversion Phase
B
B
IN
. Figure 14 and Figure 15 show
4kΩ
4kΩ
SW2
SW2
IN
COMPARATOR
COMPARATOR
channel.
CAPACITIVE DAC
CAPACITIVE DAC
CAPACITIVE DAC
CONTROL
CONTROL
LOGIC
LOGIC