AD9433 Analog Devices, AD9433 Datasheet - Page 10

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AD9433

Manufacturer Part Number
AD9433
Description
12-Bit 105/125 MSPS Analog-To-Digital IF Sampling Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9433

Resolution (bits)
12bit
# Chan
1
Sample Rate
125MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
2 V p-p
Adc Architecture
Pipelined
Pkg Type
QFP

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AD9433
Figure 17. Integral Nonlinearity vs. Output Code with SFDR Mode Disabled
Figure 16. Dynamic Performance vs. Encode Duty Cycle, f
f
–0.25
–0.50
–0.75
IN
–0.1
–0.2
–0.3
–0.4
–0.5
–95
–90
–85
–80
–75
–70
–65
0.75
0.50
0.25
0.5
0.4
0.3
0.2
0.1
= 49.3 MHz, Differential AIN @ −0.5 dBFS, SFDR Mode Enabled
0
0
0
0
0
Figure 18. Differential Nonlinearity vs. Output Code
10
512
512
WORST OTHER (dBc)
20
1024
1024
30
DUTY CYCLE HIGH (%)
1536
SECOND HARMONIC (dBc)
1536
OUTPUT CODE
OUTPUT CODE
40
SNR (dB)
2048
2048
50
THIRD HARMONIC (dBc)
2560
2560
60
3072
3072
70
3584
3584
S
80
= 105 MSPS,
4096
4096
90
Rev. A | Page 10 of 20
Figure 20. Integral Nonlinearity vs. Output Code with SFDR Mode Enabled
Figure 21. FFT: f
300
280
260
240
220
200
180
–0.25
–0.50
–0.75
–100
–110
–120
0.75
0.50
0.25
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
0
0
0
0
Figure 19. I
512
S
Differential AIN, SFDR Mode Enabled
= 61.44 MSPS, f
25
DD
7.68
Differential AIN @ −0.5 dBFS
1024
ENCODE FREQUENCY (MHz)
and I
CC
1536
FREQUENCY (MHz)
50
vs. Encode Rate, f
OUTPUT CODE
I
CC
IN
I
DD
= 46.08 MHz, Four WCDMA Carriers,
15.36
(mA)
2048
(mA)
75
2560
IN
23.04
= 10.3 MHz,
3072
100
3584
125
30.72
4096
18
15
12
9
6
3
0

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