AD7475 Analog Devices, AD7475 Datasheet - Page 3

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AD7475

Manufacturer Part Number
AD7475
Description
1 MSPS, 12-Bit A/D Converter in MSOP-8 or SOIC-8
Manufacturer
Analog Devices
Datasheet

Specifications of AD7475

Resolution (bits)
12bit
# Chan
1
Sample Rate
1MSPS
Interface
Ser
Analog Input Type
SE-Uni
Ain Range
Uni (Vref)
Adc Architecture
SAR
Pkg Type
SOIC,SOP

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AD7475 SPECIFICATIONS
V
Table 1.
Parameter
DYNAMIC PERFORMANCE
DC ACCURACY
ANALOG INPUT
REFERENCE INPUT
LOGIC INPUTS
LOGIC OUTPUTS
CONVERSION RATE
DD
Signal-to-Noise and Distortion
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Full Power Bandwidth
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Input Voltage Ranges
DC Leakage Current
Input Capacitance
REF IN Input Voltage Range
DC Leakage Current
Input Capacitance
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
Output High Voltage, V
Output Low Voltage, V
Floating-State Leakage Current
Floating-State Output Capacitance
Output Coding
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
= 2.7 V to 5.25 V, V
Ratio (SINAD)
(SFDR)
Second-Order Terms
Third-Order Terms
IN
IN
INL
INH
DRIVE
2
OL
OH
= 2.7 V to 5.25 V, REF IN = 2.5 V, f
A Version
68
−75
−76
−78
−78
10
50
8.3
1.3
12
±1.5
±0.5
+1.5/−0.9
±0.5
±8
±3
±1
20
2.5
±1
20
V
0.4
±1
10
0.4
±10
10
800
300
325
1
DRIVE
Straight (Natural) Binary
− 1
0 to REF IN
V
DRIVE
1
− 0.2
±1
+1.5/−0.9
B Version
68
−75
−76
−78
−78
10
50
8.3
1.3
12
±0.5
±0.5
±8
±3
±1
20
2.5
±1
20
V
0.4
±1
10
0.4
±10
10
800
300
325
1
DRIVE
− 1
Rev. B | Page 3 of 24
SCLK
1
= 20 MHz, T
Unit
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
Bits
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB max
V
μA max
pF typ
V
μA max
pF typ
V min
V max
μA max
pF max
V min
V max
μA max
pF max
ns max
ns max
ns max
MSPS max
A
= T
MIN
to T
MAX
Test Conditions/Comments
f
f
f
@ 3 dB
@ 0.1 dB
@ 5 V (typ @ 3 V)
@ 25°C
@ 5 V guaranteed no missed codes to
@ 25°C
Typically ±2.5 LSB
±1% for specified performance
Typically 10 nA, V
I
I
16 SCLK cycles with SCLK at 20 MHz
Sine wave input
Full-scale step input
See the Serial Interface section
SOURCE
SINK
, unless otherwise noted.
IN
IN
IN
12 bits (typ @ 3 V)
= 300 kHz sine wave, f
= 300 kHz sine wave, f
= 300 kHz sine wave, f
= 200 μA
= 200 μA; V
IN
DRIVE
AD7475/AD7495
= 0 V or V
= 2.7 V to 5.25 V
SAMPLE
SAMPLE
SAMPLE
DRIVE
= 1 MSPS
= 1 MSPS
= 1 MSPS

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