AD7339 Analog Devices, AD7339 Datasheet

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... Two 8-bit parallel DACs are also included as are two serial control DACs. These serial DACs are 8-bit DACs. The AD7339, which operates with a single 5 V power supply, has a bandgap reference on board with a nominal value of 2 reduce the power consumption of the part, each section, except the reference, can be individually powered down when not in use ...

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... AD7339–SPECIFICATIONS Parameter ADC Resolution Differential Nonlinearity Integral Nonlinearity Zero Input Offset Error Signal Range Full Power Input Bandwidth Conversion Rate Signal to (Noise + Distortion) Effective No. of Bits (ENOB) Intermodulation Distortion Error Rate Input Capacitance Coding PARALLEL DACS Resolution Differential Nonlinearity Integral Nonlinearity ...

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... OUT 0.4 V max |I OUT 15 pF max 4.5/5.5 V min/max 45 mA max Active Mode 4.5 mA max + Load on VREF 5 mA max – + Load on VREF 2VREF +5.5V POWER SUPPLY 4.753 4.253 +4.5V POWER SUPPLY 0.2 0 217 243 ANALOG OUTPUT VOLTAGE –3– +5V POWER SUPPLY 255 AD7339 ...

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... AD7339 TIMING CHARACTERISTICS Limit at Parameter T = – + ADC t 480 1 t 210 2 t 210 3 t 100 4 t 200 5 PARALLEL DACS t 430 6 t 200 7 t 200 8 t 130 150 11 t 250 12 SERIAL DACS 950 16 t 950 17 t 480 ...

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... SAMPLE N–2 N–1 Figure 3. ADC Timing DATA Figure 4. Parallel DACs Timing Figure 5. Serial DACs Timing –5– AD7339 SAMPLE N+1 SAMPLE N DATA 10% 90% 16 D9(MSB 10% N+1 D7 ...

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... Lead Temperature, Soldering Vapor Phase (60 sec +215 C Infrared (15 sec +220 C Model AD7339BS CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this device features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...

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... Analog ground connection for the reference. Analog input to the ADC. The analog input must be appropriately ac coupled. The AD7339 can accept an analog input maximum. ADC Input Clock, CMOS Logic Input. The analog input is sampled on the rising edge of ADCCLK. ADCCLK is nominally set to 2.048 MHz. ...

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... VREFA/VREFB outputs are placed in a standby mode, drawing a minimal cur- rent. The reference, which is available on the VREF pin, is not powered down. Serial Input Data. Serial data is latched into the AD7339 registers on the rising edge of SCLK. The digital data uses CMOS logic. Data is loaded into the latches ...

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... When this bit is set to 0, the factory trimmed value is used as the offset value, while the user programmed value is used when D5 equals 1. When the offset is user controlled used to inform the AD7339 to +1V – 1LSB reduce or increase the DAC output voltage. When D4 equals 0, the DAC output is reduced, while the DAC output is increased when D4 equals 1 ...

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... V *These are the nominal output voltages with V Serial DACs The AD7339 has two serial DACs on board. The serial DACs have an architecture similar to the parallel DACs. The 8-bit digital word to each DAC is serially loaded. The serial DACs have a common serial port. To distinguish between the two DACs, 10-bit bursts are transferred to the DACs, the two MSBs identifying the DAC to which the 8-bit word loaded ...

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... Intermodulation terms are those for which not equal to zero. For the AD7339, the Intermodulation Distortion is the level to which the second and third intermodulation terms are suppressed below a full scale output signal level, the second order terms being (fa + fb) and (fa – ...

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... The analog ground plane should be allowed to run under the AD7339 to avoid noise coupling. The power supply lines to the AD7339 should use as large a track as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching sig- nals such as clocks should be shielded with digital ground to avoid radiating noise to other sections of the board ...