AD9201 Analog Devices, AD9201 Datasheet - Page 3
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AD9201
Manufacturer Part Number
AD9201
Description
Dual Channel 20 MHz 10-Bit Resolution CMOS ADC
Manufacturer
Analog Devices
Datasheet
1.AD9201.pdf
(20 pages)
Specifications of AD9201
Resolution (bits)
10bit
# Chan
2
Sample Rate
20MSPS
Interface
Par
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
1 V p-p,2 V p-p
Adc Architecture
Pipelined
Pkg Type
SOP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9201ARS
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9201ARSZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD9201ARSZ-REEL
Manufacturer:
SIEMENS
Quantity:
3
Parameter
DYNAMIC PERFORMANCE (SE)
DIGITAL INPUTS
LOGIC OUTPUT (with DVDD = 3 V)
LOGIC OUTPUT (with DVDD = 5 V)
CLOCKING
NOTES
1
2
3
Specifications subject to change without notice.
REV. D
AIN differential 2 V p-p, REFT = 1.5 V, REFB = –0.5 V.
IMD referred to larger of two input signals.
SE is single ended input, REFT = 1.5 V, REFB = –0.5 V.
Signal-to-Noise and Distortion
Signal-to-Noise
Total Harmonic Distortion
Spurious Free Dynamic Range
High Input Voltage
Low Input Voltage
DC Leakage Current
Input Capacitance
High Level Output Voltage
Low Level Output Voltage
High Level Output Voltage
Low Level Output Voltage
Data Valid Delay
MUX Select Delay
Data Enable Delay
Data High-Z Delay
Clock Pulsewidth High
Clock Pulsewidth Low
Pipeline Latency
f = 3.58 MHz
f = 3.58 MHz
f = 3.58 MHz
f = 3.58 MHz
(I
(I
(I
(I
OH
OL
OH
OL
= 1.5 mA)
= 1.5 mA)
= 50 A)
= 50 A)
OUTPUT
SELECT
CLOCK
INPUT
INPUT
DATA
t
OD
ADC SAMPLE
#1
3
SAMPLE #1-3
Q CHANNEL
OUTPUT
OUTPUT ENABLED
Q CHANNEL
Symbol
SINAD
SNR
THD
SFDR
V
V
I
C
V
V
V
V
t
t
t
t
t
t
OD
MD
ED
DHZ
CH
CL
IN
IH
IL
IN
OH
OL
OH
OL
ADC SAMPLE
#2
SAMPLE #1-2
Q CHANNEL
OUTPUT
Figure 1. ADC Timing
SAMPLE #1-1
Q CHANNEL
Min
2.4
22.5
22.5
ADC SAMPLE
#3
OUTPUT
t
MD
–3–
52.3
55.5
–55
–58
2
2.88
0.095
4.5
0.4
11
7
13
13
Typ
3.0
6
SAMPLE #1-1
I CHANNEL
OUTPUT
ADC SAMPLE
#4
Max
0.3
SAMPLE #1
Q CHANNEL
OUTPUT
SAMPLE #1
I CHANNEL
OUTPUT
Units
dB
dB
dB
dB
V
V
pF
V
V
V
V
ns
ns
ns
ns
ns
ns
Cycles
A
ADC SAMPLE
#5
I CHANNEL
OUTPUT ENABLED
SAMPLE #2
Q CHANNEL
OUTPUT
Condition
C
90% of Final Value
L
= 20 pF. Output Level to
AD9201