AD7731 Analog Devices, AD7731 Datasheet - Page 6

• Manufacturer Part Number: AD7731
• Description: Low Noise, High Throughput 24-Bit Sigma-Delta ADC
• Manufacturer: Analog Devices

Specifications of AD7731

• Resolution (bits): 24bit
• # Chan: 3
• Sample Rate: 5MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: (2Vref/PGA Gain) p-p,(Vref/PGA Gain) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: DIP,SOIC,SOP

AD7731
BURNOUT CURRENTS
USER TO EASILY DETECT
CURRENTS ALLOW THE
IF A TRANSDUCER HAS
TWO 100nA BURNOUT
BURNT OUT OR GONE
OPEN-CIRCUIT
SEE PAGE 23
FIVE PSEUDO-DIFFERENTIAL INPUT
PAIRS TO BE SWITCHED TO THE
FULLY DIFFERENTIAL PAIRS OR
A DIFFERENTIAL MULTIPLEXER
ALLOWS SELECTION OF THREE
MULTIPLEXER IS CONTROLLED
ANALOG MULTIPLEXER
VIA THE SERIAL INTERFACE
BUFFER AMPLIFIER. THE
SEE PAGE 23
AIN3/D1
AIN4/D0
AIN1
AIN2
AIN5
AIN6
IMPEDANCE INPUT STAGE
FOR THE ANALOG INPUTS
THE BUFFER AMPLIFIER
ALLOWING SIGNIFICANT
BUFFER AMPLIFIER
EXTERNAL SOURCE
PRESENTS A HIGH
IMPEDANCES
SEE PAGE 23
MUX
AV
DD
AD7731
AV
AGND
DD
RECONFIGURED TO BECOME
Figure 2. Detailed Functional Block Diagram
TWO OUTPUT DIGITAL PORT
PROGRAMMABLE GAIN
AGND
THE AIN3 AND AIN4 INPUT
PROGRAMMED OVER THE
GAIN AMPLIFIER ALLOWS
RANGES FROM +20mV TO
BUFFER
DV
SEVEN BIPOLAR INPUT
SEVEN UNIPOLAR AND
OUTPUT DRIVERS
THE PROGRAMMABLE
LINES THAT CAN BE
CHANNELS CAN BE
SERIAL INTERFACE
DD
SEE PAGE 32
SEE PAGE 23
AMPLIFIER
+1.28V
DGND
REF IN(–) REF IN(+)
PGA
AND CONTROL LOGIC
SERIAL INTERFACE
MICROCONTROLLER
POL
CALIBRATION
VOLTAGE CAN BE SELECTED TO
REFERENCE DETECT CIRCUITRY
THE REFERENCE INPUT TO THE
TESTS FOR OPEN OR SHORTED
OPERATION. THE REFERENCE
MICROCONTROLLER
NUMBER OF DIFFERENT
BE NOMINALLY +2.5V OR +5V.
CALIBRATION OPTIONS
THE AD7731 OFFERS A
SYSTEM CALIBRATION
PART IS DIFFERENTIAL AND
FACILITATES RATIOMETRIC
–6–
INCLUDING SELF AND
MODULATOR
CALIBRATION
SIGMA-DELTA A/D CONVERTER
SIGMA-
SEE PAGE 28
DELTA
DIFFERENTIAL
REFERENCE
REFERENCES
SEE PAGE 24
RDY
REGISTER BANK
PROGRAMMABLE
GENERATION
DIGITAL
FILTER
TWELVE REGISTERS CONTROL
ALL FUNCTIONS ON THE PART
CLOCK
RESET
CONVERSION RESULTS
AND PROVIDE STATUS
REGISTER BANK
INFORMATION AND
SIGMA-DELTA ADC CAN BE
ARCHITECTURE ENSURES
SIGMA-DELTA ADC
CHOPPED TO REMOVE
SEE PAGE 20
24 BITS NO MISSING
CODES. THE ENTIRE
THE SIGMA-DELTA
DRIFT ERRORS
SEE PAGE 24
*SPI IS A TRADEMARK OF MOTOROLA, INC.
MCLK IN
MCLK OUT
SCLK
CS
DIN
STANDBY
SYNC
DOUT
WIRES. ALL FUNCTIONS ON THE
RESET) CAN BE ACCESSED VIA
OPERATED FROM JUST THREE
PART (APART FROM MASTER
ALLOWS PROGRAMMING OF
OUTPUT UPDATE RATE AND
SPI*-COMPATIBLE OR DSP-
INTERFACE THAT CAN BE
SETTLING TIME AND THAT
TWO STAGE FILTER THAT
HAS A FASTSTEP
THE CLOCK SOURCE FOR THE
THE SERIAL INTERFACE
CLOCK OR BY CONNECTING A
SERIAL INTERFACE
PART CAN BE PROVIDED BY
COMPATIBLE SERIAL
CONSUMPTION TO 50 W
AN EXTERNALLY-APPLIED
RESONATOR ACROSS THE
PROGRAMMABLE
CLOCK OSCILLATOR
DIGITAL FILTER
THE STANDBY MODE
CRYSTAL OR CERAMIC
STANDBY MODE
REDUCES POWER
(SEE FIGURE 3)
SEE PAGE 33
SEE PAGE 24
SEE PAGE 32
SEE PAGE 31
CLOCK PINS
CIRCUIT
TM
MODE
REV. A
REV. 0