AD7811 Analog Devices, AD7811 Datasheet - Page 17

• Manufacturer Part Number: AD7811
• Description: 10-Bit, 4-Channel, 350 kSPS, Serial A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7811

• Resolution (bits): 10bit
• # Chan: 4
• Sample Rate: 350kSPS
• Interface: Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

It is possible to implement a serial interface using the data ports
on the 8051. This would also allow a full duplex serial transfer
to be implemented. The technique involves “bit banging” an
I/O port (e.g., P1.0) to generate a serial clock and using two
other I/O ports (e.g., P1.1 and P1.2) to shift data in and out—
see Figure 22.
AD7811/AD7812 to TMS320C5x
The serial interface on the TMS320C5x uses a continuous
serial clock and frame synchronization signals to synchronize
the data transfer operations with peripheral devices like the
AD7811. Frame synchronization inputs have been supplied on
the AD7811/AD7812 to allow easy interfacing with no extra
gluing logic. The serial port of the TMS320C5x is set up to
operate in Burst Mode with internal CLKX (Tx serial clock)
and FSX (Tx frame sync). The Serial Port Control register
(SPC) must have the following setup: F0 = 0, FSM = 1,
MCM = 1 and TXM = 1. The connection diagram is shown
in Figure 23.
ADDITIONAL PINS OMITTED FOR CLARITY
ADDITIONAL PINS OMITTED FOR CLARITY
AD7811/AD7812
AD7811/AD7812
DOUT
SCLK
SCLK
DOUT
RFS
TFS
RFS
TFS
DIN
DIN
FSR
P1.0
P1.1
P1.2
P1.3
CLKX
CLKR
DR
DT
FSX
TMS320C5x
8051
AD7811/AD7812 to ADSP-21xx
The ADSP-21xx family of DSPs are easily interfaced to the
AD7811/AD7812 without the need for extra gluing logic. The
SPORT is operated in normal framing mode. The SPORT
control register should be set up as follows:
TFSW
INVRFS = INVTFS = 0, Active High Frame Signal
DTYPE = 00, Right Justify Data
SLEN
ISCLK = 1, Internal Serial Clock
TFSR
IRFS
ITFS
The 10-bit data words will be right justified in the 16-bit serial
data registers when using this configuration. Figure 24 shows
the connection diagram.
AD7811/AD7812 to DSP56xxx
The connection diagram in Figure 25 shows how the AD7811
and AD7812 can be connected to the SSI (Synchronous Serial
Interface) of the DSP56xxx family of DSPs from Motorola. The
SSI is operated in Synchronous Mode (SYN bit in CRB =1)
with internally generated 1-bit clock period frame sync for both
Tx and Rx (FSL1 and FSL0 bits in CRB = 1 and 0 respectively).
ADDITIONAL PINS OMITTED FOR CLARITY
ADDITIONAL PINS OMITTED FOR CLARITY
AD7811/AD7812
AD7811/AD7812
= RFSW = 0, Normal Framing
= 1001, 10-Bit Data Words
= RFSR = 1, Frame Every Word
= 0, External Framing Signal
= 1, Internal Framing Signal
DOUT
SCLK
SCLK
DOUT
RFS
TFS
RFS
TFS
DIN
DIN
AD7811/AD7812
SCK
SRD
STD
SC2
SCLK
DR
DT
RFS
TFS
ADSP-21xx
DSP56xxx