AD7715 Analog Devices, AD7715 Datasheet - Page 16

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AD7715

Manufacturer Part Number
AD7715
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7715

Resolution (bits)
16bit
# Chan
1
Sample Rate
19.2kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni
Ain Range
(Vref/PGA Gain) p-p,Uni (Vref)/(PGA Gain)
Adc Architecture
Sigma-Delta
Pkg Type
DIP,SOIC,SOP

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AD7715
OUTPUT NOISE
AD7715-5
Table 15 shows the AD7715-5 output rms noise for the selecta-
ble notch and −3 dB frequencies for the part, as selected by FS1
and FS0 of the setup register. The numbers given are for the
bipolar input ranges with a V
typical and are generated at a differential analog input voltage
of 0 V with the part used in unbuffered mode (BUF bit of the
setup register = 0). Table 16 meanwhile shows the output peak-
to-peak noise for the selectable notch and −3 dB frequencies
for the part. It is important to note that these numbers represent
Table 15. Output RMS Noise vs. Gain and Output Update Rate for AD7715-5 (Unbuffered Mode)
Filter First Notch and Output Data Rate
MCLK IN =
2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
Table 16. Peak-to-Peak Resolution vs. Gain and Output Update Rate for AD7715-5 (Unbuffered Mode)
Filter First Notch and Output Data Rate
MCLK IN =
2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
Table 17. Output RMS Noise vs. Gain and Output Update Rate for AD7715-5 (Buffered Mode)
Filter First Notch and Output Data Rate
MCLK IN =
2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
Table 18. Peak-to-Peak Resolution vs. Gain and Output Update Rate for AD7715-5 (Buffered Mode)
Filter First Notch and Output Data Rate
MCLK IN =
2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
MCLK IN =
1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
MCLK IN =
1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
MCLK IN =
1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
MCLK IN =
1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
REF
of 2.5 V. These numbers are
−3 dB Frequency
MCLK IN =
2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
−3 dB Frequency
MCLK IN =
2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
−3 dB Frequency
MCLK IN =
2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
−3 dB Frequency
MCLK IN =
2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
Rev. D | Page 16 of 40
MCLK IN =
1 MHz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
MCLK IN =
1 MHz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
MCLK IN =
1 MHz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
MCLK IN =
1 MHz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
the resolution for which there is no code flicker. They are not
calculated based on rms noise but on peak-to-peak noise. The
numbers given are for the bipolar input ranges with a V
2.5 V and for the BUF bit of the setup register = 0. These num-
bers are typical, are generated at an analog input voltage of 0 V
and are rounded to the nearest LSB.
Meanwhile, Table 17 and Table 18 show rms noise and peak-
to-peak resolution respectively with the AD7715-5 operating
under the same conditions as above except that now the part is
operating in buffered mode (BUF bit of the setup register = 1).
Typical Peak-to-Peak Resolution in Bits
Gain = 1
16
16
13
10
Typical Peak-to-Peak Resolution in Bits
Gain = 1
16
16
13
10
Typical Output RMS Noise (μV)
Gain = 1
3.8
4.8
103
530
Typical Output RMS Noise (μV)
Gain = 1
4.3
5.1
103
550
Gain = 2
Gain = 2
16
16
13
10
16
16
13
10
Gain = 2
2.2
3.1
50
280
Gain = 2
1.9
2.4
45
250
Gain = 32
16
16
13
10
Gain = 32
15
15
13
10
Gain = 32
0.9
1.0
3.9
18
Gain = 32
0.6
0.6
3.0
18
Gain = 128
14
13
12
10
Gain = 128
13
13
12
10
Gain = 128
0.52
0.62
1.6
5.5
Gain = 128
0.9
1.0
2.1
6
REF
of

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