AD5664R Analog Devices, AD5664R Datasheet

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AD5664R

Manufacturer Part Number
AD5664R
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5664R

Resolution (bits)
16bit
Dac Update Rate
220kSPS
Dac Settling Time
4µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser,SPI

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Low power, smallest pin-compatible, quad nanoDACs
User-selectable external or internal reference
10-lead MSOP and 3 mm × 3 mm LFCSP_WD
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale
Per channel power-down
Serial interface, up to 50 MHz
APPLICATIONS
Process controls
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5624R/AD5644R/AD5664R, members of the nanoDAC®
family, are low power, quad, 12-/14-/16-bit buffered voltage-out
DACs. All devices operate from a single 2.7 V to 5.5 V supply
and are guaranteed monotonic by design.
The AD5624R/AD5644R/AD5664R have an on-chip reference.
The AD56x4R-3 has a 1.25 V, 5 ppm/°C reference, giving a full-
scale output range of 2.5 V; the AD56x4R-5 has a 2.5 V, 5 ppm/°C
reference giving a full-scale output range of 5 V. The on-chip
reference is off at power-up, allowing the use of an external refer-
ence; all devices can be operated from a single 2.7 V to 5.5 V
supply. The internal reference is enabled via a software write.
The part incorporates a power-on reset circuit that ensures the
DAC output powers up to 0 V and remains there until a valid
write takes place. The part contains a per-channel power-down
feature that reduces the current consumption of the device to
480 nA at 5 V and provides software-selectable output loads
while in power-down mode. The low power consumption of
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
FEATURES
AD5664R: 16 bits
AD5644R: 14 bits
AD5624R: 12 bits
External reference default
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Quad, 12-/14-/16-Bit nanoDACs with
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
SCLK
SYNC
Table 1. Related Devices
Part No.
AD5624/AD5664
AD5666
this part in normal operation makes it ideally suited to portable
battery-operated equipment.
The AD5624R/AD5644R/AD5664R use a versatile 3-wire serial
interface that operates at clock rates up to 50 MHz, and is com-
patible with standard SPI, QSPI™, MICROWIRE™, and DSP
interface standards. The on-chip precision output amplifier
enables rail-to-rail output swing.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
DIN
5 ppm/°C On-Chip Reference
AD5624R/AD5644R/AD5664R
Quad 12-/14-/16-bit DACs.
On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
Available in 10-lead MSOP and 10-lead, 3 mm × 3 mm,
LFCSP_WD.
Low power, typically consumes 1.32 mW at 3 V and
2.25 mW at 5 V.
AD5624R/AD5644R/AD5664R
INTERFACE
LOGIC
FUNCTIONAL BLOCK DIAGRAM
V
DD
©2006–2008 Analog Devices, Inc. All rights reserved.
Description
2.7 V to 5.5 V quad, 12-/16-bit DACs, external
reference
2.7 V to 5.5 V quad, 16-bit DAC, internal
reference, LDAC, CLR pins
REGISTER
REGISTER
REGISTER
REGISTER
INPUT
INPUT
INPUT
INPUT
POWER-ON
LOGIC
Figure 1.
GND
REGISTER
REGISTER
REGISTER
REGISTER
DAC
DAC
DAC
DAC
V
REFIN
STRING
STRING
STRING
STRING
DAC A
DAC B
DAC C
DAC D
/V
REFOUT
1.25V/2.5V REF
BUFFER
BUFFER
BUFFER
BUFFER
www.analog.com
POWER-
DOWN
LOGIC
V
V
V
V
OUT
OUT
OUT
OUT
A
B
C
D

Related parts for AD5664R

AD5664R Summary of contents

Page 1

... LDAC, CLR pins this part in normal operation makes it ideally suited to portable battery-operated equipment. The AD5624R/AD5644R/AD5664R use a versatile 3-wire serial interface that operates at clock rates MHz, and is com- patible with standard SPI, QSPI™, MICROWIRE™, and DSP interface standards. The on-chip precision output amplifier enables rail-to-rail output swing ...

Page 2

... Applications ..................................................................................... 25   Using a Reference as a Power Supply for the AD5624R/AD5644R/AD5664R ............................................... 25   Bipolar Operation Using the   AD5624R/AD5644R/AD5664R ............................................... 25   Using AD5624R/AD5644R/AD5664R with a Galvanically   Isolated Interface ........................................................................ 25   Power Supply Bypassing and Grounding ................................ 26   Outline Dimensions ....................................................................... 27   Ordering Guide .......................................................................... 28   Rev Page   ...

Page 3

... V At ambient ±5 ±10 ppm/°C MSOP package models ±10 ppm/°C LFCSP package models 7.5 kΩ Rev Page AD5624R/AD5644R/AD5664R unless otherwise noted. MIN MAX = 5 V ± 10 kΩ to GND kΩ to GND ∞ kΩ ...

Page 4

... All Power-Down Modes 1 Temperature range: B grade: −40°C to +105°C. 2 Linearity calculated using a reduced code range: AD5664R (Code 512 to Code 65,024); AD5644R (Code 128 to Code 16,256); AD5624R (Code 32 to Code 4064). Output unloaded. 3 Guaranteed by design and characterization, not production tested. 4 Interface inactive. All DACs active. DAC outputs unloaded. ...

Page 5

... All Power-Down Modes 1 Temperature range: B grade: −40°C to +105°C. 2 Linearity calculated using a reduced code range: AD5664R (Code 512 to Code 65,024); AD5644R (Code 128 to Code 16,256); AD5624R (Code 32 to Code 4064). Output unloaded. 3 Guaranteed by design and characterization, not production tested. 4 Interface inactive. All DACs active. DAC outputs unloaded. ...

Page 6

... GND Table 4. 2 Parameter Min Output Voltage Settling Time AD5624R AD5644R AD5664R Slew Rate Digital-to-Analog Glitch Impulse Digital Feedthrough Reference Feedthrough Digital Crosstalk Analog Crosstalk DAC-to-DAC Crosstalk Multiplying Bandwidth Total Harmonic Distortion Output Noise Spectral Density ...

Page 7

... SCLK falling edge to SYNC rising edge ns min Minimum SYNC high time ns min SYNC rising edge to SCLK fall ignore ns min SCLK falling edge to SYNC fall ignore DB0 Figure 2. Serial Write Operation Rev Page AD5624R/AD5644R/AD5664R + V )/2 (see Figure 2 ...

Page 8

... AD5624R/AD5644R/AD5664R ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 6. Parameter V to GND GND OUT GND REFIN REFOUT Digital Input Voltage to GND Operating Temperature Range Industrial Storage Temperature Range Junction Temperature (T max) J Power Dissipation Thermal Impedance LFCSP_WD Package (4-Layer Board) θ ...

Page 9

... GND The AD5624R/AD5644R/AD5664R have a common pin for reference input and reference output. When using the REFIN REFOUT internal reference, this is the reference output pin. When using an external reference, this is the reference input pin. The default for this pin reference input. ...

Page 10

... Rev Page REF T = 25° 10k 20k 30k 40k 50k CODE Figure 7. AD5664R DNL, External Reference REF T = 25° 2500 5000 7500 10000 12500 CODE Figure 8. AD5644R DNL, External Reference ...

Page 11

... 2.5V REFOUT T = 25° –2 –4 –6 –8 –10 CODE Figure 10. AD5664R-5 INL, Internal Reference 2.5V REFOUT 25° –1 –2 –3 –4 CODE Figure 11. AD5644R-5 INL, Internal Reference 1 2.5V 0.8 REFOUT T = 25° ...

Page 12

... Rev Page 1.25V REFOUT T = 25°C A CODE Figure 19. AD5664R-3 DNL, Internal Reference 1.25V REFOUT T = 25°C A CODE Figure 20. AD5644R-3 DNL, Internal Reference 1.25V REFOUT T = 25° 500 ...

Page 13

... Figure 26. Zero-Scale Error and Offset Error vs. Temperature REF 1.0 MAX INL 0.5 0 –0.5 MIN DNL –1.0 MIN INL –1.5 –2.0 2.7 5.2 Figure 27. Gain Error and Full-Scale Error vs. Supply Rev Page AD5624R/AD5644R/AD5664R GAIN ERROR FULL-SCALE ERROR – TEMPERATURE (°C) ZERO-SCALE ERROR OFFSET ERROR –20 ...

Page 14

... AD5624R/AD5644R/AD5664R 1 25°C A 0.5 ZERO-SCALE ERROR 0 –0.5 –1.0 –1.5 –2.0 –2.5 2.7 3.2 3.7 4.2 V (V) DD Figure 28. Zero-Scale Error and Offset Error vs. Supply 25° 0.41 0.42 0.43 I (mA) DD Figure 29. I Histogram with External Reference 25° 0.92 0.94 0.96 I (mA) DD Figure 30 ...

Page 15

... CH1 2. CH1 5.0V 80 100 CH3 5.0V Figure 39. Exiting Power-Down to Midscale Rev Page AD5624R/AD5644R/AD5664R REF T = 25°C A FULL-SCALE CODE CHANGE 0x0000 TO 0xFFFF OUTPUT LOADED WITH 2kΩ AND 200pF TO GND V = 909mV/DIV OUT TIME BASE = 4µs/DIV Figure 37. Full-Scale Settling Time ...

Page 16

... AD5624R/AD5644R/AD5664R 2.538 2.537 T = 25°C A 2.536 5ns/SAMPLE NUMBER 2.535 GLITCH IMPULSE = 9.494nV 2.534 1LSB CHANGE AROUND MIDSCALE (0x8000 TO 0x7FFF) 2.533 2.532 2.531 2.530 2.529 2.528 2.527 2.526 2.525 2.524 2.523 2.522 2.521 0 50 100 150 200 250 300 SAMPLE NUMBER Figure 40 ...

Page 17

... Figure 47. Total Harmonic Distortion –5 –10 –15 –20 –25 –30 –35 –40 8k 10k 10k Rev Page AD5624R/AD5644R/AD5664R = V REF DD = 25° CAPACITANCE (nF) Figure 48. Settling Time vs. Capacitive Load 25°C ...

Page 18

... DAC register. Ideally, the output should The zero-code error is always positive in the AD5664R because the output of the DAC cannot go below 0 V due to a combination of the offset errors in the DAC and the output amplifier. Zero-code error is expressed in mV. A plot of zero-code error vs ...

Page 19

... The energy of the glitch is expressed in nV-s. AD5624R/AD5644R/AD5664R Multiplying Bandwidth The amplifiers within the DAC have a finite bandwidth. The multiplying bandwidth is a measure of this. A sine wave on the reference (with full-scale code loaded to the DAC) appears on the output ...

Page 20

... All devices (AD56x4R-3 and the AD56x4R-5) can be operated from a single 2 5.5 V supply. SERIAL INTERFACE The AD5624R/AD5644R/AD5664R have a 3-wire serial interface ( SYNC , SCLK, and DIN) that is compatible with SPI, QSPI, and MICROWIRE interface standards as well as with most DSPs. See Figure 2 The write sequence begins by bringing the SYNC line low ...

Page 21

... (see Table 9), and then the 16-, 14-, 12-bit data-word. The data-word comprises the 16-, 14-, 12-bit input code followed don’t care bits, for the AD5664R, AD5644R, and AD5624R, respectively (see Figure 52, Figure 53, and Figure 54). These data bits are transferred to the DAC ...

Page 22

... DB2, DB1, and DB0 Table 12. 24-Bit Input Shift Register Contents for Software Reset Command DB23 to DB22 (MSB) DB21 DB20 Don’t care Command bits (C2 to C0) Table 13. 24-Bit Input Shift Register Contents of Power-Down/Power-Up Operation for the AD5624R/AD5644R/AD5664R DB23 to DB22 (MSB) DB21 DB20 DB19 Don’ ...

Page 23

... LDAC FUNCTION The AD5624R/AD5644R/AD5664R DACs have double- buffered interfaces consisting of two banks of registers: input registers and DAC registers. The input registers are connected directly to the input shift register and the digital code is tra ferred to the relevant input register on completion of a valid write sequence ...

Page 24

... Da first. To load data to the AD5624R/AD5644R/AD5664R, PC7 is left low after the first eight bits are transferred, and a second serial write oper ation is performed to the DAC; PC7 is taken high end of thi ...

Page 25

... USING A REFERENCE AS A POWER SUPPLY FOR THE AD5624R/AD5644R/AD5664R Because the supply current required by the AD5624R/AD5644R/ AD5664R is extremely low, an alternative option is to use a voltage reference to supply the required voltage to the part (see Figure 61). This is especially useful if the power supply is quite noisy the system supply voltages are at some value other than for example ...

Page 26

... AD5644R/AD5664R should have separate analog and digital sections, each having its own area of the board. If the AD5624R/ AD5644R/AD5664R are in a system where other devices require an AGND-to-DGND connection, the connection should be made at one point only. This ground point should be as close as possible to the AD5624R/AD5644R/AD5664R ...

Page 27

... Body, Very Very Thin, Dual Lead (CP-10-9) Dimensions shown in millimeters 3.10 3.00 2. 5.15 3.10 4.90 3.00 4.65 2. PIN 1 0.50 BSC 0.95 0.85 1.10 MAX 0.75 0.15 0.33 SEATING 0.23 0.05 PLANE 0.17 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 65. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters Rev Page AD5624R/AD5644R/AD5664R 0.50 BSC 10 1.74 EXPOSED PAD 1.64 1.49 1 2.48 2.38 2.23 0.80 8° 0.60 0° 0.40 ...

Page 28

... AD5664RBCPZ-3REEL7 −40°C to +105°C 1 AD5664RBRMZ-3 −40°C to +105°C 1 AD5664RBRMZ-3REEL7 −40°C to +105 AD5664RBRMZ-5 1 −40°C to +105°C 1 AD5664RBRMZ-5REEL7 −40°C to +105°C 1 EVAL-AD5664REBZ RoHS Compliant Part. ©2006–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...

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