AD5764 Analog Devices, AD5764 Datasheet - Page 23

• Manufacturer Part Number: AD5764
• Description: Complete Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC
• Manufacturer: Analog Devices

Specifications of AD5764

• Resolution (bits): 16bit
• Dac Update Rate: 1.26MSPS
• Dac Settling Time: 8µs
• Max Pos Supply (v): +16.5V
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

Data Sheet
OFFSET AND GAIN ADJUSTMENT WORKED
EXAMPLE
Using the information provided in the Fine Gain Register and
Offset Register sections, the following worked example demon-
strates how the AD5764 functions can be used to eliminate both
offset and gain errors. Because the AD5764 is factory calibrated,
offset and gain errors should be negligible. However, errors can
be introduced by the system that the AD5764 is operating within;
for example, a voltage reference value that is not equal to 5 V
introduces a gain error. An output range of ±10 V and twos
complement data coding is assumed.
Removing Offset Error
The AD5764 can eliminate an offset error in the range of −4.88 mV
to +4.84 mV with a step size of ⅛ of a 16-bit LSB.
Calculate the step size of the offset adjustment.
Measure the offset error by programming 0x0000 to the data
register and measuring the resulting output voltage. For this
example, the measured value is 614 μV.
Calculate the number of offset adjustment steps that this value
represents.
The offset error measured is positive, therefore, a negative
adjustment of 16 steps is required. The offset register is eight
bits wide and the coding is twos complement. The required
offset register value can be calculated as follows:
Convert the adjustment value to binary: 00010000.
Offset
Number
38
614
.
14
μV
μV
Adjust
of
=
Steps
16
Step
Steps
=
Size
Measured
=
Offset
2
16
20
×
Step
Offset
8
=
38
Size
Value
.
14
μV
=
Rev. F | Page 23 of 28
Convert this to a negative twos complement number by inverting
all bits and adding 1 to obtain 11110000, the value that should
be programmed to the offset register.
Note that this twos complement conversion is not necessary in the
case of a positive offset adjustment. The value to be programmed to
the offset register is simply the binary representation of the
adjustment value.
Removing Gain Error
The AD5764 can eliminate a gain error at negative full-scale
output in the range of −9.77 mV to +9.46 mV with a step size of
½ of a 16-bit LSB.
Calculate the step size of the gain adjustment.
Measure the gain error by programming 0x8000 to the data
register and measuring the resulting output voltage. The gain
error is the difference between this value and −10 V. For this
example, the gain error is −1.2 mV.
Calculate how many gain adjustment steps this value represents.
The gain error measured is negative (in terms of magnitude);
therefore, a positive adjustment of eight steps is required. The
gain register is 6 bits wide and the coding is twos complement,
the required gain register value can be determined as follows:
Convert the adjustment value to binary: 001000.
The value to be programmed to the gain register is simply this
binary number.
Gain
Number
152
1
2 .
.
59
mV
Adjust
μV
of
=
Steps
Step
8
Steps
Size
=
Measured
=
Gain
2
16
20
×
2
Step
Gain
=
152
Size
Value
.
59
μV
=
AD5764