AD5666 Analog Devices, AD5666 Datasheet

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AD5666

Manufacturer Part Number
AD5666
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5666

Resolution (bits)
16bit
Dac Update Rate
95kSPS
Dac Settling Time
6µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser,SPI

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FEATURES
Low power quad 16-bit DAC
14-lead TSSOP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Power down to 400 nA @ 5 V, 200 nA @ 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale or midscale
3 power-down functions
Hardware LDAC with LDAC override function
CLR function to programmable code
SDO daisy-chaining option
Rail-to-rail operation
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5666 is a low power, quad, 16-bit, buffered voltage-
output DAC. The part operates from a single 2.7 V to 5.5 V
supply and is guaranteed monotonic by design.
The AD5666 has an on-chip reference with an internal gain of 2.
The AD5666-1 has a 1.25 V 5 ppm/°C reference, giving a full-scale
output of 2.5 V; the AD5666-2 has a 2.5 V 5 ppm/°C reference,
giving a full-scale output of 5 V. The on-board reference is off at
power-up, allowing the use of an external reference. The internal
reference is turned on by writing to the DAC.
The part incorporates a power-on reset circuit that ensures that
the DAC output powers up to 0 V (POR pin low) or to midscale
(POR pin high) and remains powered up at this level until a valid
write takes place. The part contains a power-down feature that
reduces the current consumption of the device to 400 nA at 5 V
and provides software-selectable output loads while in power-down
mode for any or all DAC channels.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
On-Chip Reference in 14-Lead TSSOP
Quad, 16-Bit DAC with 5 ppm/°C
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
SYNC
The outputs of all DACs can be updated simultaneously using
the LDAC function, with the added functionality of user-select-
able DAC channels to simultaneously update. There is also an
asynchronous CLR that clears all DACs to a software-selectable
code—0 V, midscale, or full scale.
The AD5666 utilizes a versatile 3-wire serial interface that operates
at clock rates of up to 50 MHz and is compatible with standard
SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The
on-chip precision output amplifier enables rail-to-rail output
swing.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
SCLK
SDO
DIN
AD5666
Quad, 16-bit DAC.
On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
Available in 14-lead TSSOP.
Selectable power-on reset to 0 V or midscale.
Power-down capability. When powered down, the DAC
typically consumes 200 nA at 3 V and 400 nA at 5 V.
LDAC
INTERFACE
LOGIC
LDAC
FUNCTIONAL BLOCK DIAGRAM
CLR
©2005–2010 Analog Devices, Inc. All rights reserved.
REGISTER
REGISTER
REGISTER
REGISTER
POWER-ON
INPUT
INPUT
INPUT
INPUT
RESET
POR
V
DD
Figure 1.
REGISTER
REGISTER
REGISTER
REGISTER
DAC
DAC
DAC
DAC
V
REFIN
STRING
STRING
STRING
STRING
DAC A
DAC B
DAC C
DAC D
/V
REFOUT
1.25V/2.5V
REF
BUFFER
BUFFER
BUFFER
BUFFER
AD5666
www.analog.com
POWER-DOWN
LOGIC
GND
V
V
V
V
OUT
OUT
OUT
OUT
A
B
C
D

Related parts for AD5666

AD5666 Summary of contents

Page 1

... The AD5666 has an on-chip reference with an internal gain of 2. The AD5666-1 has a 1. ppm/°C reference, giving a full-scale output of 2.5 V; the AD5666-2 has a 2 ppm/°C reference, giving a full-scale output The on-board reference is off at power-up, allowing the use of an external reference. The internal reference is turned on by writing to the DAC ...

Page 2

... AD5666 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Characteristics ........................................................................ 7 Timing Characteristics ................................................................ 8 Absolute Maximum Ratings .......................................................... 10 ESD Caution ................................................................................ 10 Pin Configuration and Function Descriptions ........................... 11 Typical Performance Characteristics ........................................... 12 Terminology .................................................................................... 18 Theory of Operation ...................................................................... 20 D/A Section ................................................................................. 20 REVISION HISTORY 6/10—Rev Rev. D Changes to Figure 19 and Figure 20 Captions ............................ 14 10/09— ...

Page 3

... Due to load current change ∞ kΩ L Ω μs Coming out of power-down mode V V μ 5.5 V REF DD V kΩ Per DAC channel V At ambient ppm/°C kΩ μA All digital inputs AD5666 = ...

Page 4

... AD5666 Parameter Min 3 LOGIC OUTPUTS (SDO) Output Low Voltage Output High Voltage − High Impedance Leakage Current High Impedance Output Capacitance POWER REQUIREMENTS V 4 (Normal Mode (All Power-Down Modes 4 5.5 V ...

Page 5

... L Ω coming out of power-down mode DD μs Coming out of power-down V V μ 3.6 V REF DD kΩ Per DAC channel V At ambient ppm/°C kΩ μ SINK SOURCE μA pF AD5666 = ...

Page 6

... AD5666 A Grade Parameter Min Current POWER REQUIREMENTS V 2 (Normal Mode (All Power-Down Modes 2 3 Temperature range is −40°C to +105°C, typical at 25°C. 2 Linearity calculated using a reduced code range of 512 to 65,024. Output unloaded. ...

Page 7

... Daisy-chain mode; SDO load 0.1 nV-s 0.5 nV-s 2.5 nV-s 3 nV-s 340 kHz ± 0.2 V p-p REF − ± 0.1 V p-p, frequency = 10 kHz REF 120 nV/√Hz DAC code = 0x8400, 1 kHz 100 nV/√Hz DAC code = 0x8400, 10 kHz 15 μV p-p 0 Rev Page AD5666 unless otherwise noted. MIN MAX 3 ...

Page 8

... AD5666 TIMING CHARACTERISTICS All input signals are specified with ns/V (10 Figure 2 5.5 V. All specifications T DD Table 4. Limit MIN MAX Parameter ...

Page 9

... DB0 Figure 3. Serial Write Operation DB0 DB31 INPUT WORD FOR DAC DB31 INPUT WORD FOR DAC N Figure 4. Daisy-Chain Timing Diagram Rev Page AD5666 DB0 DB0 ...

Page 10

... AD5666 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter Rating V to GND −0 Digital Input Voltage to GND −0 GND −0 OUT GND −0 REFIN REFOUT Operating Temperature Range Industrial −40°C to +105°C Storage Temperature Range − ...

Page 11

... V /V The AD5666 has a common pin for reference input and reference output. When using the internal REFIN REFOUT reference, this is the reference output pin. When using an external reference, this is the reference input pin. The default for this pin reference input. ...

Page 12

... Rev Page 2.5V REFOUT T = 25°C A CODE Figure 9. DNL—AD5666 1.25V REFOUT T = 25°C A CODE Figure 10. INL—AD5666 1.25V REFOUT T = 25°C A CODE Figure 11. DNL—AD5666-1 ...

Page 13

... Figure 15. Zero-Scale Error and Offset Error vs. Supply Voltage 3 3.0 2.5 2.0 1.5 1.0 0 100 Figure 16 2.0 1.5 1.0 0.5 0 5.2 1.26 Figure 17. I Rev Page AD5666 ZERO-SCALE ERROR OFFSET ERROR 3.2 3.7 4.2 4.7 5 5.5V DD 0.63 0.64 0.65 0.66 0.67 0.68 0.69 0.7 0.71 0.72 I (mA) DD Histogram with External Reference 5.5V DD 1.28 1.30 1.32 1.34 1.36 1.38 I (mA) DD ...

Page 14

... AD5666 0.50 DAC LOADED WITH DAC LOADED WITH 0.40 FULL-SCALE ZERO-SCALE SOURCING CURRENT SINKING CURRENT 0. 1.25V REFOUT 0 –0.10 –0. –0. 2.5V REFOUT –0.40 –0.50 –10 –8 –6 –4 –2 0 CURRENT (mA) Figure 18. Headroom at Rails vs. Source and Sink 6. 2.5V REFOUT 5. ° C ...

Page 15

... MAX(C2)* 2.489 420.0mV 2.488 2.487 2.486 2.485 0 8.0ns/pt Rev Page AD5666 REF T = 25° OUT CH2 1.0V M100μs 125MS/s 8.0ns/pt A CH1 1.28V Figure 27. Power-On Reset to Midscale SYNC ...

Page 16

... AD5666 2.5000 2.4995 2.4990 2.4985 2.4980 2.4975 2.4970 2.4965 2.4960 2.4955 2.4950 0 64 128 192 256 SAMPLE Figure 30. Analog Crosstalk 2.4900 2.4895 2.4890 2.4885 2.4880 2.4875 2.4870 2.4865 2.4860 2.4855 0 64 128 192 256 SAMPLE Figure 31. DAC-to-DAC Crosstalk ...

Page 17

... Figure 37. Settling Time vs. Capacitive Load 10k CH3 5. –5 –10 –15 –20 5V –25 –30 –35 –40 10k Rev Page AD5666 CLR V F OUT V B OUT CH2 1.0V M200ns A CH3 1.10V CH4 1.0V Figure 38. Hardware CLR 25°C A 100k 1M FREQUENCY (Hz) Figure 39. Multiplying Bandwidth ...

Page 18

... DAC register. Ideally, the output should The zero-code error is always positive in the AD5666, because the output of the DAC cannot go below due to a combination of the offset errors in the DAC and output amplifier. Zero-code error is expressed in millivolts. ...

Page 19

... Total harmonic distortion is the difference between an ideal sine wave and its attenuated version using the DAC. The sine wave is used as the reference for the DAC, and the THD is a measure of the harmonics present on the DAC output measured in decibels. Rev Page AD5666 ...

Page 20

... The AD5666 has an on-chip reference with an internal gain of 2. The AD5666-1 has a 1. ppm/°C reference, giving a full-scale output of 2.5 V. The AD5666-2 has a 2 ppm/°C reference, giving a full-scale output The on-board reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a write to a control register ...

Page 21

... Figure 19 and Figure 20. The slew rate is 1.5 V/μs with a ¼ to ¾ scale settling time of 10 μs. SERIAL INTERFACE The AD5666 has a 3-wire serial interface ( SYNC , SCLK, and DIN) that is compatible with SPI, QSPI, and MICROWIRE interface standards as well as most DSPs. See timing diagram of a typical write sequence ...

Page 22

... (see Table 8), followed by the 4-bit DAC address bits (see Table 9) and finally the 16-bit data-word. The data-word comprises the 16-bit input code followed by four don’t care bits for the AD5666 (see Figure 42). These data bits are transferred to the DAC register on the 32 SCLK. ...

Page 23

... The AD5666 contains a power-on reset circuit that controls the output voltage during power-up. By connecting the POR pin low, the AD5666 output powers connecting the POR pin high, the AD5666 output powers up to midscale. The output remains powered up at this level until a valid write sequence is made to the DAC ...

Page 24

... AD5666 Table 9. Daisy-Chain Enable/Internal Reference Register DCEN (DB1 Table 10. 32-Bit Input Shift Register Contents for Daisy-Chain Enable and Reference Set-Up Function MSB DB31 to DB28 DB27 DB26 DB25 Don’t cares Command bits (C3 to C0) Table 11. Modes of Operation DB9 ...

Page 25

... This ground point should be as close as possible to the AD5666. The power supply to the AD5666 should be bypassed with 10 μF and 0.1 μF capacitors. The capacitors should physically be as close as possible to the device, with the 0.1 μF capacitor ideally right up against the device. The 10 μ ...

Page 26

... AD5666 Table 13. Clear Code Register Clear Code Register DB1 DB0 CR1 CR0 Clears to Code 0 0 0x0000 0 1 0x8000 1 0 0xFFFF operation Table 14. 32-Bit Input Shift Register Contents for Clear Code Function MSB DB31 to DB28 DB27 DB26 DB25 Don’t cares Command bits (C3 to C0) Table 15 ...

Page 27

... ORDERING GUIDE 1 Model Temperature Range AD5666BRUZ-1 −40°C to +105°C AD5666BRUZ-1REEL7 −40°C to +105°C AD5666BRUZ-2 −40°C to +105°C AD5666BRUZ-2REEL7 −40°C to +105°C AD5666ARUZ-2 −40°C to +105°C AD5666ARUZ-2REEL7 −40°C to +105°C EVAL-AD5666EBZ RoHS Compliant Part. 5.10 5.00 4. 6.40 BSC 1 7 ...

Page 28

... AD5666 NOTES ©2005–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05298–0–6/10(D) Rev Page ...

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