AD7398 Analog Devices, AD7398 Datasheet - Page 8

• Manufacturer Part Number: AD7398
• Description: Quad, Serial-Input 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of AD7398

• Resolution (bits): 12bit
• Dac Update Rate: 167kSPS
• Dac Settling Time: 6µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

AD7398/AD7399
INPUT REGISTERS
AD7398 SERIAL INPUT REGISTER DATA FORMAT
Data is loaded in the MSB first format.
MSB
B15
SA
NOTE
Bit Position B14 and Bit Position B15 are the SD and SA power shutdown control bits. If SA is set to Logic 1, all DACs are placed in the power shutdown mode. If SD is set
AD7399 SERIAL INPUT REGISTER DATA FORMAT
Data is loaded in the MSB first format.
MSB
B13
SA
NOTE
Bit Position B12 and Bit Position B13 are the SD and SA power shutdown control bits. If SA is set to Logic 1, all DACs are placed in the power shutdown mode. If SD is set
Table 6. AD7398/AD7399 Address Decode Control
SA
1
0
0
0
0
0
0
0
0
to Logic 1, the address decoded by Bit B12 and Bit B13 (A0 and A1) determine the DAC channel that is placed in the power shutdown state.
to Logic 1, the address decoded by Bit B10 and Bit B11 (A0 and A1) determine the DAC channel that is placed in the power shutdown state.
B14
SD
B12
SD
SD
X
1
1
1
1
0
0
0
0
B13
A1
B11
A1
A1
X
0
0
1
1
0
0
1
1
B12
A0
B10
A0
B11
D11
A0
X
0
1
0
1
0
1
0
1
B9
D9
B10
D10
B8
D8
DAC Channel Affected
All DACs shutdown
DAC A shutdown
DAC B shutdown
DAC C shutdown
DAC D shutdown
DAC A input register decoded
DAC B input register decoded
DAC C input register decoded
DAC D input register decoded
B9
D9
Rev. C | Page 8 of 24
B7
D7
B8
D8
B6
D6
B7
D7
B6
D6
B5
D5
B5
D5
B4
D4
B4
D4
B3
D3
B3
D3
B2
D2
B2
D2
B1
D1
B1
D1
LSB
B0
D0
LSB
B0
D0