AD5325 Analog Devices, AD5325 Datasheet - Page 4

• Manufacturer Part Number: AD5325
• Manufacturer: Analog Devices

Specifications of AD5325

• Resolution (bits): 12bit
• Dac Update Rate: 125kSPS
• Dac Settling Time: 8µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: I2C/Ser 2-wire,Ser

AD5305/AD5315/AD5325
Parameter
LOGIC INPUTS (A0)
LOGIC INPUTS (SCL, SDA)
LOGIC OUTPUT (SDA)
POWER REQUIREMENTS
1
2
3
4
5
6
7
Temperature range (A, B version): −40°C to +105°C; typical at +25°C.
See the Terminology section.
DC specifications tested with the outputs unloaded.
Linearity is tested using a reduced code range: AD5305 (Code 8 to 248); AD5315 (Code 28 to 995); AD5325 (Code 115 to 3981).
Guaranteed by design and characterization, not production tested.
For the amplifier output to reach its minimum voltage, offset error must be negative; to reach its maximum voltage, V
positive.
I
DD
Input Current
Input Low Voltage, V
Input High Voltage, V
Pin Capacitance
Input High Voltage, V
Input Low Voltage, V
Input Leakage Current, I
Input Hysteresis, V
Input Capacitance, C
Glitch Rejection
Output Low Voltage, V
Three-State Leakage Current
Three-State Output
V
I
I
DD
DD
specification is valid for all DAC codes. Interface inactive. All DACs active and excluding load currents.
DD
Capacitance
V
V
V
V
(Normal Mode)
(Power-Down Mode)
DD
DD
DD
DD
= 4.5 V to 5.5 V
= 2.5 V to 3.6 V
= 4.5 V to 5.5 V
= 2.5 V to 3.6 V
2
5
HYST
7
5
IL
IL
IN
IH
IH
5
OL
IN
Min
2.4
2.1
2.0
0.7
V
−0.3
0.05
V
2.5
DD
DD
A Version
Typ
3
8
8
600
500
0.2
0.08
1
Max
±1
0.8
0.6
0.5
V
0.3
0.3 V
±1
50
0.4
0.6
±1
5.5
900
700
1
1
DD
+
DD
Rev. G | Page 4 of 24
Min
2.4
2.1
2.0
0.7
V
−0.3
0.05
V
2.5
DD
DD
B Version
Typ
3
8
8
600
500
0.2
0.08
1
Max
±1
0.8
0.6
0.5
V
0.3
0.3 V
±1
50
0.4
0.6
±1
5.5
900
700
1
1
DD
+
DD
Unit
V
V
V
pF
μA
pF
μA
V
V
V
V
V
V
pF
μA
ns
V
V
V
μA
μA
μA
μA
REF
= V
Conditions/Comments
V
V
V
V
V
V
SMBus compatible at V
SMBus compatible at V
Input filtering suppresses noise spikes
of less than 50 ns
I
I
V
V
I
0 readback on SDA
I
0 readback on SDA
SINK
SINK
DD
DD
DD
DD
DD
DD
DD
DD
IH
IH
DD
= 4 μA (maximum) during
= 1.5 μA (maximum) during
= V
= V
= 5 V ± 10%
= 3 V ± 10%
= 2.5 V
= 5 V ± 10%
= 3 V ± 10%
= 2.5 V
= 3 mA
= 6 mA
and offset plus gain error must be
DD
DD
and V
and V
IL
IL
= GND
= GND
DD
DD
< 3.6 V
< 3.6 V