AD5554 Analog Devices, AD5554 Datasheet - Page 8

• Manufacturer Part Number: AD5554
• Description: Quad, Current-Output, Serial-Input 16-/14-Bit DACs
• Manufacturer: Analog Devices

Specifications of AD5554

• Resolution (bits): 14bit
• Dac Update Rate: 500kSPS
• Dac Settling Time: 0.9µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Ser,SPI

AD5544/AD5554
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
TSSOP
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
LFCSP
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
A
A
V
V
I
I
Figure 5. TSSOP Pin Configuration
GND
OUT
R
R
OUT
GND
REF
REF
MSB
CLK
FB
V
FB
SDI
RS
CS
DD
A
A
A
A
B
B
B
B
Mnemonic
A
I
V
R
MSB
RS
V
CS
CLK
SDI
R
V
I
A
A
I
V
R
NC
SDO
LDAC
A
V
DGND
R
10
11
12
13
14
NC = NO CONNECT
OUT
OUT
OUT
1
2
3
4
5
6
7
8
9
REF
FB
DD
FB
REF
REF
FB
SS
FB
GND
GND
GND
GND
(Not to Scale)
A
B
C
D
C
A
B
A
B
C
AD5544/
AD5554
TOP VIEW
A
B
C
F
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Description
DAC A Analog Ground.
DAC A Current Output.
DAC A Reference Voltage Input Terminal. Establishes DAC A full-scale output voltage. This pin can be
tied to the V
Establish the voltage output for DAC A by connecting to an external amplifier output.
MSB Bit. Set pin during a reset pulse (RS) or at system power-on if tied to ground or V
Reset Pin, Active Low Input. Input registers and DAC registers are set to all 0s or half-scale code
(0x8000 for the
Register data = 0x0000 when MSB = 0.
Positive Power Supply Input. Specified range of operation: 5 V ± 10%.
Chip Select, Active Low Input. Disables shift register loading when high. Transfers serial register data
to the input register when CS/LDAC returns high. Does not affect LDAC operation.
Clock Input. Positive edge clocks data into the shift register.
Serial Data Input. Input data loads directly into the shift register.
Establish the voltage output for DAC B by connecting to an external amplifier output.
DAC B Reference Voltage Input Terminal. Establishes DAC B full-scale output voltage. This pin can be
tied to the V
DAC B Current Output.
DAC B Analog Ground.
DAC C Analog Ground.
DAC C Current Output.
DAC C Reference Voltage Input Terminal. Establishes DAC C full-scale output voltage. This pin can be
tied to the V
Establish the voltage output for DAC C by connecting to an external amplifier output.
No Connect. Leave the pin unconnected.
Serial Data Output. Input data loads directly into the shift register. Data appears at SDO at 19 clock
pulses for the
Load DAC Register Strobe, Level Sensitive Active Low. Transfers all input register data to DAC
registers. Asynchronous active low input. See Table 8 and Table 9 for operation.
High Current Analog Force Ground.
Negative Bias Power Supply Input. Specified range of operation: −5.5 V to +0.3 V.
Digital Ground Pin.
Establish the voltage output for DAC D by connecting to an external amplifier output.
A
I
V
R
DGND
V
A
SDO
NC
R
V
I
A
LDAC
OUT
OUT
REF
SS
REF
GND
FB
GND
FB
GND
D
C
D
C
D
C
D
F
C
DD
DD
DD
AD5544
pin.
pin.
pin.
AD5544
and 17 clock pulses for the
Rev. F | Page 8 of 28
and 0x2000 for the AD5554), determined by the voltage on the MSB pin.
A
NOTES
1. NC = NO CONNECT.
2. CONNECT EXPOSED PAD TO AGND.
V
I
GND
R
AD5554
OUT
REF
MSB
V
FB
RS
CS
DD
A
A
A
A
Figure 6. LFCSP Pin Configuration
1
2
3
4
5
6
7
8
after input at the SDI pin.
(Not to Scale)
AD5544
TOP VIEW
24 DGND
23 V
22 A
21 LDAC
20 SDO
19 NC
18 R
17 V
SS
REF
GND
FB
Data Sheet
C
C
F
DD
.