AD7564 Analog Devices, AD7564 Datasheet - Page 12

• Manufacturer Part Number: AD7564
• Description: +3.3 V/+5 V, Low Power, Quad 12-Bit CMOS DAC
• Manufacturer: Analog Devices

Specifications of AD7564

• Resolution (bits): 12bit
• Dac Update Rate: 1.8MSPS
• Dac Settling Time: 550ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Ser

AD7564
BIPOLAR OPERATION
4-Quadrant Multiplication)
Figure 18 shows the standard connection diagram for bipolar
operation of any one of the DACs in the AD7564. The coding
is offset binary as shown in Table IV. When V
the circuit performs 4-quadrant multiplication. To maintain
the gain error specifications, resistors R3, R4 and R5 should be
ratio matched to 0.01%.
Digital Input
MSB . . . LSB
1111 1111 1111
1000 0000 0001
1000 0000 0000
0111 1111 1111
0000 0000 0001
0000 0000 0000
NOTE
Nominal LSB size for the circuit of Figure 18 is given by: V
SINGLE SUPPLY APPLICATIONS
The “–B” versions of the AD7564 are specified and tested for
single supply applications. Figure 19 shows a typical circuit for
operation with a single +3.3 V to +5 V supply.
V
Figure 18. Bipolar Operation (4-Quadrant Multiplication)
NOTES:
IN
1. ONLY ONE DAC IS SHOWN FOR CLARITY.
2. DIGITAL INPUT CONNECTIONS ARE OMITTED.
3. C1 PHASE COMPENSATION (5–15pF) MAY BE
REQUIRED WHEN USING HIGH SPEED AMPLIFIER, A1.
Figure 19. Single Supply Current Mode Operation
V
IN
NOTES:
R1 20
Table IV. Bipolar (Offset Binary) Code Table
1. ONLY ONE DAC IS SHOWN FOR CLARITY.
2. DIGITAL INPUT CONNECTIONS ARE OMITTED.
3. C1 PHASE COMPENSATION (5–15pF) MAY BE
V
REF
REQUIRED WHEN USING HIGH SPEED AMPLIFIER, A1.
R4 20k
V
A
REF
A
AD7564
V
DAC A
R
BIAS
FB
AD7564
DAC A
R
A
FB
A
R2 10
I
I
OUT1
SIGNAL
OUT2
I
I
OUT1
OUT2
GND
Analog Output
(V
–V
–V
–V
–V
–V
–V
A
A
A
A
OUT
REF
REF
REF
REF
REF
REF
C1
(0/2048 = 0)
(2048/2048) = –V
(2047/2048)
(1/2048)
(1/2048)
(2047/2048)
as Shown in Figure 18)
A1
A1
10k
R3
IN
REF
is an ac signal,
R4 20
(1/2048).
20k
A2
R5
V
OUT
REF
V
OUT
–12–
In the current mode circuit of Figure 19, I
is biased positive by an amount V
correctly, the DAC ladder termination resistor must be con-
nected internally to I
The output voltage is given by:
As D varies from 0 to 4095/4096, the output voltage varies
from V
low impedance source capable of sinking and sourcing all pos-
sible variations in current at the I
problems.
Voltage Mode Circuit
Figure 20 shows DAC A of the AD7564 operating in the
voltage-switching mode. The reference voltage, V
to the I
voltage is available at the V
positive reference voltage results in a positive output voltage;
making single supply operation possible. The output from the
DAC is a voltage at a constant impedance (the DAC ladder re-
sistance). Thus, an op amp is necessary to buffer the output
voltage. The reference voltage input no longer sees a constant
input impedance, but one which varies with code. So, the volt-
age input should be driven from a low impedance source.
It is important to note that V
cause the switches in the DAC no longer have the same source-
drain voltage. As a result, their on-resistance differs and this
degrades the integral linearity of the DAC. Also, V
go negative by more than 0.3 volts or an internal diode will turn
on, causing possible damage to the device. This means that the
full-range multiplying capability of the DAC is lost.
Figure 20. Single Supply Voltage Switching Mode
Operation
V
NOTES
1. ONLY ONE DAC IS SHOWN FOR CLARITY.
2. DIGITAL INPUT CONNECTIONS ARE OMITTED.
3. C1 PHASE COMPENSATION (5–15pF) MAY BE
IN
OUT
OUT1
V
REQUIRED WHEN USING HIGH SPEED AMPLIFIER.
OUT
= V
pin, I
I
I
OUT1
OUT2
BIAS
A
A
OUT2
D
to V
OUT2
AD7564
R
is connected to AGND and the output
R
DAC A
R
OUT
FB
DAC
. This is the case with the AD7564.
FB
A
REF
= 2 V
IN
terminal. In this configuration, a
(V
is limited to low voltages be-
V
OUT2
BIAS
BIAS
REF
BIAS
R1
A
. For the circuit to operate
– V
terminal without any
–V
IN
OUT2
IN
R2
. V
A1
)
BIAS
and hence I
V
IN
should be a
IN
BIAS
is applied
must not
V
OUT
REV.
OUT1
B
,