AD660 Analog Devices, AD660 Datasheet
AD660
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AD660 Summary of contents
Page 1
... LSB for a full-scale step. The AD660 has an extremely flexible digital interface. Data can be loaded into the AD660 in serial mode or as two 8-bit bytes. This is made possible by two digital input pins that have dual functions. The serial mode input format is pin selectable to be MSB or LSB first ...
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... Bipolar Configuration ................................................................ 11 Internal/External Reference Use .............................................. 11 Output Settling and Glitch ........................................................ 13 Digital Circuit Details ................................................................ 14 Microprocessor Interface ............................................................... 15 AD660 to MC68HC11 (SPI Bus) Interface ............................. 15 AD660 to MICROWIRE Interface ........................................... 15 AD660 to ADSP-210x Family Interface .................................. 15 AD660 to Z80 Interface ............................................................. 16 Noise ............................................................................................ 16 Board Layout ................................................................................... 17 ...
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... AD660 Unit Bits V V μA μA LSB LSB LSB LSB LSB LSB Bits % of FSR ppm/° FSR ppm/°C mV ppm/°C mV ppm/°C kΩ kΩ V ppm/° ...
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... unipolar mode and bipolar mode. 2 Gain error and gain drift are measured using the internal reference. The internal reference is the main contributor to gain drift. If lower gain drift is required, the AD660 can be used with a precision external reference such as the AD587, AD586, or AD688. ...
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... BES BEH Figure 2. AD660 Byte Load Timing Rev Page AD660 Unit ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ns min ...
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... DB1 (DATADIR OUT VALID 1 VALID LOW HIGH t CLK Figure 3. AD660 Serial Load Timing t CLR t SET 1 = BIPOLAR UNIPOLAR 0 Figure 4. Asynchronous Clear to Bipolar or Unipolar Zero VALID 16 t PROP Figure 5. Serial Out Timing Rev Page ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION , −V , and + Rev Page AD660 ...
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... REF OUT Internal Reference Voltage Output Pin –V REF OUT REF SPAN/BIPOLAR OFFSET DGND OUT AD660 DB7/DB15 AGND 5 20 TOP VIEW DB6/DB14 LDAC 6 19 (Not to Scale) DB5/DB13 CLR 7 18 DB4/DB12 SER 8 17 DB3/DB11 HBE 9 16 ...
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... DAC and the output amplifier and is measured with all 0s loaded in the DAC. Bipolar Zero Error When the AD660 is connected for bipolar output and 10…000 is loaded in the DAC, the deviation of the analog output from the ideal midscale value called the bipolar zero error. ...
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... V output range. In this mode, 50 Ω resistors are tied between the SPAN/BIPOLAR OFFSET terminal (Pin 22) and V and between REF OUT (Pin 24) and REF IN (Pin 23 possible to use the AD660 without any external components by tying Pin 24 directly to Pin 23 and Pin 22 directly to Pin 21. Eliminating these resistors increases the gain error by 0.25% of FSR. ...
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... This reference is buffered and optimized for use in a high speed DAC and gives long-term stability equal or superior to the best discrete Zener diode references. The performance of the AD660 is specified with the internal reference driving the DAC and with the DAC alone (for use with a precision external reference). ...
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... Bipolar Configuration section. Use −5.000000 V and +4.999847, as the output values. The AD660 can also be used with the AD587 10 V reference, using the same configuration shown in Figure 12 to produce a ±10 V output. The highest grade AD587UQ is specified at 5 ppm/° ...
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... Figure 13. Using the AD660 with the AD688 High Precision ±10 V Reference OUTPUT SETTLING AND GLITCH The AD660 output buffer amplifier typically settles to within 0.0008% FS (1/2 LSB) of its final value in 8 μs for a full-scale step. Figure 14 and Figure 15 show settling for a full-scale and an LSB step, respectively, with a 2 kΩ ...
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... LBE , when CLR is strobed, sends the DAC output to unipolar zero, a high to bipolar zero.) The AD660 does not recognize the status of HBE when in serial mode. Data is clocked into the input register on the rising edge shown in Figure 3 ...
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... Figure 17. The MOSI, SCK, and SS pins of the 68HC11 are respectively connected to the DB0/DB8/SIN and LDAC pins of the AD660. The SER pin of the AD660 is tied low causing the first rank latch to be transparent. The majority of the interfacing issues are taken care of in the software initialization ...
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... AD660, qualified by the coincidence of the input/output request ( IORQ ) and write ( WR ) pins. The least significant address bit (A0) determines if the low or high byte register of the AD660 is active. More significant address bits select between input register loading, DAC output update, and unipolar or bipolar clear. ...
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... If an external reference is used, this should also be returned to the analog ground single AD660 is used with separate analog and digital ground planes, connect the analog ground plane to AGND and the digital ground plane to DGND keeping lead lengths as short as possible. ...
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... AD660 OUTLINE DIMENSIONS 24 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. 0.005 (0.13) PIN 1 ...
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... AD660BRZ-REEL −40°C to +85°C AD660SQ −55°C to +125°C 2 AD660SQ/883B −55°C to +125° RoHS Compliant Part. 2 For further details, refer to the AD660SQ/883B military data sheet. 15.60 (0.6142) 15.20 (0.5984 7.60 (0.2992) 7.40 (0.2913) 1 10.65 (0.4193) 12 10.00 (0.3937) 2.65 (0.1043) 2.35 (0.0925) SEATING 0 ...
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... AD660 NOTES ©1993–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D01813-0-6/08(B) Rev Page ...