ADA4817-2 Analog Devices, ADA4817-2 Datasheet - Page 5

• Manufacturer Part Number: ADA4817-2
• Description: Low Noise, 1 GHz FastFET Op Amps
• Manufacturer: Analog Devices

Specifications of ADA4817-2

• -3db Bandwidth: 1.05GHz
• Slew Rate: 870V/µs
• Vos: 2mV
• Ib: 2pA
• # Opamps Per Pkg: 2
• Input Noise (nv/rthz): 4nV/rtHz
• Vcc-vee: 5V to 10V
• Isy Per Amplifier: 21mA
• Packages: CSP

ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
specified for a device soldered in the circuit board for the
surface-mount packages.
Table 4.
Package Type
LFCSP_VD (ADA4817-1)
SOIC_N_EP (ADA4817-1)
LFSCP_VQ (ADA4817-2)
MAXIMUM SAFE POWER DISSIPATION
The maximum safe power dissipation for the ADA4817-1/
ADA4817-2 are limited by the associated rise in junction
temperature (T
the glass transition temperature), the properties of the plastic
change. Even temporarily exceeding this temperature limit may
change the stresses that the package exerts on the die, permanently
shifting the parametric performance of the ADA4817-x. Exceeding
a junction temperature of 175°C for an extended period can result
in changes in silicon devices, potentially causing degradation or
loss of functionality.
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
die due to the ADA4817-1/ADA4817-2 drive at the output.
The quiescent power is the voltage between the supply pins (V
multiplied by the quiescent current (I
JA
is specified for the worst-case conditions, that is, θ
J
) on the die. At approximately 150°C (which is
θ
94
79
64
JA
S
).
D
Rating
10.6 V
See Figure 4
−V
±V
−65°C to +125°C
−40°C to +105°C
300°C
150°C
) is the sum of the
S
S
θ
29
29
14
− 0.5 V to +V
JC
JA
Unit
°C/W
°C/W
°C/W
is
S
+ 0.5 V
Rev. A | Page 5 of 28
S
)
P
Consider RMS output voltages. If R
in single-supply operation, the total drive power is V
the rms signal levels are indeterminate, consider the worst-case
scenario, when V
In single-supply operation with R
case situation is V
Airflow increases heat dissipation, effectively reducing θ
More metal directly in contact with the package leads and
exposed paddle from metal traces, throughholes, ground,
and power planes also reduces θ
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the exposed paddle
LFCSP_VD (single 94°C/W), SOIC_N_EP (single 79°C/W)
and LFCSP_VQ (dual 64°C/W) package on a JEDEC standard
4-layer board. θ
ESD CAUTION
D
Figure 4. Maximum Safe Power Dissipation vs. Ambient Temperature for
= Quiescent Power + (Total Drive Power – Load Power)
P
P
D
D
3.5
3.0
2.5
2.0
1.5
1.0
0.5
=
=
0
–40
(
(
V
V
S
–30 –20 –10 0
S
ADA4817-1, LFCSP
×
×
JA
I
I
S
S
OUT
values are approximations.
OUT
ADA4817-2, LFCSP
)
) (
+
+
= V
= V
⎛
⎜
⎜
⎝
V
V
AMBIENT TEMPERATURE (°C)
2
S
R
S
S
4 /
/4 for R
S
L
a 4-Layer Board
/2.
×
10 20 30 40 50 60 70 80 90 100
)
ADA4817-1/ADA4817-2
2
V
R
OUT
ADA4817-1, SOIC
L
JA
L
L
.
⎞
⎟
⎟
⎠
to midsupply.
referenced to −V
–
L
is referenced to −V
V
OUT
R
L
2
S
S
, the worst-
× I
S
JA
, as
OUT
.
. If
(1)
(2)
(3)