AD8626 Analog Devices, AD8626 Datasheet - Page 16

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AD8626

Manufacturer Part Number
AD8626
Description
Precision, Low Power, Single-Supply, JFET Amplifier in MSOP
Manufacturer
Analog Devices
Datasheet

Specifications of AD8626

-3db Bandwidth
5MHz
Slew Rate
5V/µs
Vos
50µV
Ib
0.25pA
# Opamps Per Pkg
2
Input Noise (nv/rthz)
16nV/rtHz
Vcc-vee
5V to 26V
Isy Per Amplifier
850µA
Packages
SOIC,SOP

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AD8625/AD8626/AD8627
OUTPUT AMPLIFIER FOR DACs
Many system designers use amplifiers as buffers on the output
of amplifiers to increase the DAC’s output driving capability.
The high resolution current output DACs need high precision
amplifiers on their output as current-to-voltage converters
(I/V). Additionally, many DACs operate with a single supply of
5 V. In a single-supply application, selection of a suitable op
amp may be more difficult because the output swing of the
amplifier does not usually include the negative rail, in this case
AGND. This can result in some degradation of the DAC’s
specified performance, unless the application does not use
codes near zero. The selected op amp needs to have very low
offset voltage—for a 14-bit DAC, the DAC LSB is 300 μV with a
5 V reference—to eliminate the need for output offset trims.
Input bias current should also be very low because the bias
current multiplied by the DAC output impedance (about 10 kΩ
in some cases) adds to the zero-code error. Rail-to-rail input and
output performance is desired. For fast settling, the slew rate of
the op amp should not impede the settling time of the DAC.
Output impedance of the DAC is constant and code
independent, but in order to minimize gain errors, the input
impedance of the output amplifier should be as high as possible.
The AD862x, with a very high input impedance, I
and a fast slew rate, is an ideal amplifier for these types of
applications. A typical configuration with a popular DAC is
shown in Figure 46. In these situations, the amplifier adds
another time constant to the system, increasing the settling time
of the output. The AD862x, with 5 MHz of BW, helps in
achieving a faster effective settling time of the combined DAC
and amplifier.
In applications with full 4-quadrant multiplying capability or a
bipolar output swing, the circuit in Figure 47 can be used. In
this circuit, the first and second amplifiers provide a total gain
of 2, which increases the output voltage span to 20 V. Biasing
the external amplifier with a 10 V offset from the reference
voltage results in a full 4-quadrant multiplying circuit.
B
of 1 pA,
Rev. E | Page 16 of 20
10V
DIGITAL INTERFACE CONNECTIONS
OMITTED FOR CLARITY
ADR01
INTERFACE
VREF
SERIAL
*AD5552 ONLY
V
DD
V
ONE CHANNEL
SS
Figure 47. 4-Quadrant Multiplying Application Circuit
0.1
AD5544
μ
CS
DIN
SCLK
LDAC*
F
V
A
V
5V
DD
GND
REF
F
DGND
X
AD5551/AD5552
V
Figure 46. Unipolar Output
2.5V
REFF
R
A
FB
GND
0.1
X
*
10k
5k
X
μ
Ω
F
Ω
10
AGND
V
μ
REFS
F
*
OUT
AD8626
AD8626
10k
1/2
1/2
+13V
–13V
AD8627
Ω
–10V < V
5V
UNIPOLAR
OUTPUT
OUT
< +10V
V
OUT

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