ADM690 Analog Devices, ADM690 Datasheet
ADM690
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ADM690 Summary of contents
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... CMOS RAM write protection, and power failure warn- ing. The complete family provides a variety of configurations to satisfy most microprocessor system requirements. The ADM690, ADM692 and ADM694 are available in 8-pin DIP packages and provide: 1. Power-on reset output during power-up, power-down and brownout conditions. The RESET output remains opera- tional with V as low ...
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... RESET AND WATCHDOG TIMER Reset Voltage Threshold ADM690, ADM691, ADM694, ADM695 ADM692, ADM693 Reset Threshold Hysteresis Reset Timeout Delay ADM690, ADM691, ADM692, ADM693 ADM694, ADM695 Watchdog Timeout Period, Internal Oscillator Watchdog Timeout Period, External Clock Minimum WDI Input Pulse Width RESET Output Voltage @ V ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM690–ADM695 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... CC BATT 3. The watchdog timer is not serviced within its timeout period. The reset threshold is typically 4.65 V for the ADM690/ADM691/ADM694/ADM695 and 4.4 V for the ADM692 and ADM693. RESET remains low for 50 ms (ADM690/ADM691/ADM692/ADM693) or 200 ms (ADM694/ADM695) after V returns above the threshold. RESET also goes low for 50 (200 the watchdog timer is enabled but not CC serviced within its timeout period ...
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... CMOS RAM or other low power CMOS circuitry. The supply current in battery back up is typically 0.6 A. The ADM690/ADM691/ADM694/ADM695 operates with battery voltages from 2 4.25 V and the ADM692/ADM693 operates with battery voltages from 2 4.0 V. High value capacitors, either standard electrolytic or the farad size double layer capacitors, can also be used for short-term memory back up ...
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... POWER FAIL RESET OUTPUT RESET is an active low output which provides a RESET signal to the Microprocessor whenever invalid level. When CC V falls below the reset threshold, the RESET output is forced CC low. The nominal reset voltage threshold is 4.65 V (ADM690/ ADM691/ADM694/ADM695) or 4.4 V (ADM692/ADM693 ...
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... The nominal oscillator frequency with external capacitor is: F The watchdog timeout period is fixed at 1.6 seconds, and the reset pulse width is fixed the ADM690/ADM692. On the ADM694 the watchdog timeout period is also 1.6 sec- onds but the reset pulse width is fixed at 200 ms. The ADM691/ ADM693/ADM695 allow these times to be adjusted as shown in Table I ...
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... ADM690–ADM695 CE Gating and RAM Write Protection (ADM691/ADM693/ ADM695) The ADM691/ADM693/ADM695 products include memory protection circuitry which ensures the integrity of data in mem- ory by preventing write operations when V level. There are two additional pins, CE may be used to control the Chip Enable or Write inputs of CMOS RAM ...
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... + PFI PFO 2 1.3V 30pF 1 0 1.35 1.25 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 TIME – s Figure 14. Power Fail Comparator Response Time REV. A Typical Performance Curves–ADM690–ADM695 2. +2.8V BATT T = +25 C 2.79 A 2.78 SLOPE = 20 2.77 2.76 0 200 400 600 800 1000 I – A OUT Figure 9. V vs. I Battery OUT ...
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... ADM690–ADM695 +APPLICATION INFORMATION Increasing the Drive Current If the continuous output current requirements at V 100 lower V –V voltage differential is desired, CC OUT an external PNP pass transistor may be connected in parallel with the internal transistor. The BATT ON output (ADM691/ ADM693/ADM695) can directly drive the base of the external transistor ...
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... If a replacement time of 5 seconds is allowed and assuming 4.5 V and BATTERY Figure 22a. Preventing Spurious RESETS During Battery Replacement 2. A resistor from BATT replacement. –11– ADM690–ADM695 OSC SEL ADM69x D1 D2 OSC IN *LOW = INTERNAL TIMEOUT HIGH = EXTERNAL TIMEOUT BATT BATT , a reset pulse is generated GND ...
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... CMOS RAM. A RESET pulse is also generated when V falls below 4.65 V for the CC ADM690/ADM694 or 4.4 V for the ADM692. RESET will remain low for 50 ms (200 ms for ADM694) after The watchdog timer input (WDI) monitors an I/O line from the P system ...
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... The RESET output has an internal 3 A pull-up, and can either connect to an open collector reset bus or directly drive a CMOS gate without an external pull-up resistor. and R , the micro –13– ADM690–ADM695 line drives the Chip OUT follows CE as long OUT IN goes high, inde- OUT ...
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... ADM690–ADM695 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Pin Plastic DIP (N- 0.280 (7.11) PIN 1 0.240 (6.10 0.325 (8.25) 0.430 (10.92) 0.300 (7.62) 0.348 (8.84) 0.060 (1.52) 0.210 0.015 (0.38) (5.33) MAX 0.150 0.015 (0.381) 0.160 (4.06) (3.81) 0.008 (0.204) 0.115 (2.93) MIN SEATING 0.100 0.022 (0.558) 0.070 (1.77) PLANE (2 ...
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... MAX 0.060 (1.52) 0.015 (0.38) 0.200 (5.08) MAX 0.150 (3.81) MIN PLANE 0.022 (0.558) 0.100 (2.54) 0.070 (1.78) BSC 0.014 (0.356) 0.30 (0.76) 16-Lead SOIC (R-16 0.419 (10.65 0.030 (0.75) 0.413 (10.50) 0.012 (0.3) 0.104 (2.65) 0.05 (1.27) 0.019 (0.49) 0.013 REF (0.32) –15– ADM690–ADM695 0.320 (8.13) 0.290 (7.37) 0.015 (0.381) 0.008 (0.204) 0.042 (1.07) ...
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