ADM693 Analog Devices, ADM693 Datasheet
![no-image](/images/manufacturer_photos/0/0/56/analog_devices_sml.jpg)
ADM693
Specifications of ADM693
Available stocks
Related parts for ADM693
ADM693 Summary of contents
Page 1
... A 1.3 V threshold detector for power fail warning, low battery detection monitor a power supply other than +5 V. The ADM691, ADM693 and ADM695 are available in 16-pin DIP and small outline packages and provide three additional functions. 1. Write protection of CMOS RAM or EEPROM. ...
Page 2
... RESET AND WATCHDOG TIMER Reset Voltage Threshold ADM690, ADM691, ADM694, ADM695 ADM692, ADM693 Reset Threshold Hysteresis Reset Timeout Delay ADM690, ADM691, ADM692, ADM693 ADM694, ADM695 Watchdog Timeout Period, Internal Oscillator Watchdog Timeout Period, External Clock Minimum WDI Input Pulse Width RESET Output Voltage @ V ...
Page 3
... Model ADM690AN + 0.5 V ADM690AQ OUT ADM690SQ ADM691AN ADM691AR ADM691AQ ADM691SQ ADM692AN ADM692AQ ADM692SQ ADM693AN ADM693AR ADM693AQ ADM693SQ ADM694AN ADM694AQ ADM694SQ ADM695AN ADM695AR ADM695AQ ADM695SQ –3– ADM690–ADM695 Test Conditions/Comments OSC SEL = 0 V OSC SEL = OSC ORDERING GUIDE Temperature Range Package Option – ...
Page 4
... Table I and Figure 4). With OSC SEL high or floating, the internal oscillator is enabled and the reset active time is fixed typ. (ADM691/ADM693) or 200 ms typ (ADM695). In this mode the OSC IN pin selects between fast (100 ms) and slow (1.6 s) watchdog timeout periods. In both modes, the timeout period immediately after a reset is 1 ...
Page 5
... CMOS circuitry. The supply current in battery back up is typically 0.6 A. The ADM690/ADM691/ADM694/ADM695 operates with battery voltages from 2 4.25 V and the ADM692/ADM693 operates with battery voltages from 2 4.0 V. High value capacitors, either standard electrolytic or the farad size double layer capacitors, can also be used for short-term memory back up ...
Page 6
... V as low This ensures that the CC microprocessor is held in a stable shutdown condition. This RESET active time is adjustable on the ADM691/ADM693/ ADM695 by using an external oscillator or by connecting an external capacitor to the OSC IN pin. Refer to Table I and Figure 4. The guaranteed minimum and maximum thresholds of the ADM690/ADM691/ADM694/ADM695 are 4 ...
Page 7
... Table I. ADM691, ADM693, ADM695 Reset Pulse Width and Watchdog Timeout Selections OSC SEL OSC IN Low External Clock Input Low External Capacitor Floating or High Low Floating or High Floating or High NOTE With the OSC SEL pin low, OSC IN can be driven by an external clock signal external capacitor can be connected between OSC IN and GND. The nominal internal oscillator frequency is 10 ...
Page 8
... ADM690–ADM695 CE Gating and RAM Write Protection (ADM691/ADM693/ ADM695) The ADM691/ADM693/ADM695 products include memory protection circuitry which ensures the integrity of data in mem- ory by preventing write operations when V level. There are two additional pins, CE may be used to control the Chip Enable or Write inputs of CMOS RAM ...
Page 9
... I – A OUT Figure 9. V vs. I Battery OUT OUT Backup + ADM690 ADM691 ADM692 50 ADM693 100 120 TEMPERATURE – C Figure 12. Reset Active Time vs. Temperature + PFI PFO 1.3V 1 30pF 0 1 ...
Page 10
... If the continuous output current requirements at V 100 lower V –V voltage differential is desired, CC OUT an external PNP pass transistor may be connected in parallel with the internal transistor. The BATT ON output (ADM691/ ADM693/ADM695) can directly drive the base of the external transistor. PNP TRANSISTOR +5V INPUT 0.1 F POWER V ...
Page 11
INPUT POWER BATT 10M BATTERY ADM69x PFI 10M 20k OPTIONAL CE OUT TEST LOAD Figure 20. Monitoring the Battery Status Alternate Watchdog Input Drive Circuits The watchdog feature can be enabled and disabled under pro- gram ...
Page 12
... POWER V > 8V returns CC BATTERY Figure 23b. ADM690/ADM692/ADM694 Typical Application Circuit B ADM691, ADM693, ADM695 A typical connection for the ADM691/ADM693/ADM695 is shown in Figure 24. CMOS RAM is powered from power is present this is routed routed to V BATT V , but if more current is required, an external PNP transistor CC can be added ...
Page 13
... RESET 0.1 F ware failure occurs such that WDI not toggled, the ADM691/ ADM693 will issue (200 ms for ADM695) RESET pulse after 1.6 seconds. This typically restarts the micro- processor’s power-up routine. A new RESET pulse is issued every 1.6 seconds until WDI is again strobed different watchdog timeout period is required, then a capacitor should be connected to OSC external clock may be used ...
Page 14
ADM690–ADM695 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Pin Plastic DIP (N- 0.280 (7.11) PIN 1 0.240 (6.10 0.325 (8.25) 0.430 (10.92) 0.300 (7.62) 0.348 (8.84) 0.060 (1.52) 0.210 ...
Page 15
SEATING 0.299 (7.60) REV. A 16-Lead Cerdip (Q-16 0.310 (7.87) PIN 1 0.220 (5.59 0.840 (21.34) MAX 0.060 (1.52) 0.015 (0.38) 0.200 (5.08) MAX 0.150 (3.81) MIN PLANE 0.022 (0.558) 0.100 (2.54) 0.070 (1.78) BSC 0.014 ...
Page 16
–16– ...