ADM706 Analog Devices, ADM706 Datasheet - Page 12

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ADM706

Manufacturer Part Number
ADM706
Description
3 V, Voltage Monitoring Microprocessor Supervisory Circuit
Manufacturer
Analog Devices
Datasheet

Specifications of ADM706

Us Price 1000-4999
n/a
Min Reset Timeout (ms)
160
Reset Output-stage
Active-Low/Push-Pull
Backup-battery Switch
No
Chip Enable Gating
---
Typ Watchdog Timeout (ms)
1600
Package
DIP,SOIC
Batt-backup-flg
Yes
Product Description
µP Supv w/ 4.4V Trip Voltage, Watchdog, Pwr Fail, Manual Reset & Active Low/Push-Pull Reset Output
Reset Threshold (v)
4.4

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ADM706P/ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/ADM708T
APPLICATIONS INFORMATION
A typical operating circuit is shown in Figure 20. The unregulated
dc input supply is monitored using the PFI input via the resistive
divider network. Resistor R1 and Resistor R2 are to be selected
so that when the supply voltage drops below the desired level
(for example, 5 V), the voltage on PFI drops below the 1.25 V
threshold, thereby generating an interrupt to the microprocessor.
Monitoring the preregulator input gives additional time to
execute an orderly shutdown procedure before power is lost.
UNREGULATED
Microprocessor activity is monitored using the WDI input. This
is driven using an output line from the processor. The software
routines toggle this line at least once every 1.6 seconds. If a problem
occurs and this line is not toggled, WDO goes low and a nonmask-
able interrupt is generated. This interrupt routine is to be used
to clear the problem.
If, in the event of inactivity on the WDI line, a system reset is
required, the WDO output is to be connected to the input as
shown in
DC
MR
PFI
Figure 21
MANUAL
ADM706R/
ADM706S/
ADM706T
RESET
IN
GND
ADM666A
Figure 20. Typical Application Circuit
GND
.
OUT
Figure 21. RESET from WDO
RESET
PFI
MR
WDO
WDI
ADM706R/
ADM706S/
ADM706T
GND
V
CC
3.3V
RESET
WDO
PFO
WDI
RESET
I/O LINE
MICROPROCESSOR
RESET
I/O LINE
NMI
INTERRUPT
MICROPROCESSOR
GND
V
CC
Rev. C | Page 12 of 16
MONITORING ADDITIONAL SUPPLY LEVELS
It is possible to use the power-fail comparator to monitor a second
supply as shown in Figure 22. The two sensing resistors, R1 and
R2, are selected such that the voltage on PFI drops below 1.25 V at
the minimum acceptable input supply. The PFO output can be
connected to the MR input so that a reset is generated when
the supply drops out of tolerance. In this case, if either supply
drops out of tolerance, a reset is generated.
MICROPROCESSORS WITH BIDIRECTIONAL RESET
To prevent contention for microprocessors with a bidirectional
reset line, a current limiting resistor is to be inserted between
the ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/
ADM708T RESET output pin and the microprocessor reset pin.
This limits the current to a safe level if there are conflicting output
reset levels. A suitable resistor value is 4.7 kΩ. If the reset output is
required for other uses, it should be buffered as shown in
R2
R1
V
X
ADM706R/ADM706S/
ADM706T/ADM708R/
ADM708S/ADM708T
Figure 22. Monitoring 3 V/3.3 V and an Additional Supply, V
GND
+3V/+3.3V
+3V/+3.3V
PFI
MR
Figure 23. Bidirectional Input/Output RESET
V
ADM706R/
ADM706S/
CC
ADM706T
GND
V
CC
RESET
RESET
WDI
PFO
RESET
MICROPROCESSOR
RESET
MICROPROCESSOR
BUFFERED
RESET
GND
Figure 23
X
.

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