ADM1073 Analog Devices, ADM1073 Datasheet
ADM1073
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ADM1073 Summary of contents
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... An external capacitor on the TIMER pin determines the time for which the FET gate is controlled to be high when maximum inrush current flows. The ADM1073 employs a limited consec- utive retry scheme, whereby, if the load capacitance is not fully charged within one attempt, the FET gate is pulled low and retries after a cooling period ...
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... ADM1073 TABLE OF CONTENTS General Description ......................................................................... 3 Specifications ..................................................................................... 4 Absolute Maximum Ratings ............................................................ 6 Thermal Characteristics .............................................................. 6 ESD Caution .................................................................................. 6 Pin Configuration and Function Descriptions ............................. 7 Typical Performance Characteristics ............................................. 8 Functional Description .................................................................. 13 Hot Circuit Insertion ................................................................. 13 Initial Startup .............................................................................. 13 Board Removal ........................................................................... 14 Controlling the Current ............................................................. 14 Sense ............................................................................................. 15 Sense Resistor .............................................................................. 15 Soft Start (SS Pin) ....................................................................... 15 GATE ............................................................................................ 15 V ................................................................................................. 15 ...
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... EE while a resistor between TIMER and V IN increased. The ADM1073 has separate UV and OV pins for undervoltage and overvoltage detection. The FET is turned off nontransient voltage less than the undervoltage threshold (typically − detected on the UV pin greater than the overvoltage threshold (typically − detected on the OV pin ...
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... ADM1073 SPECIFICATIONS − −40°C to +85°C, unless otherwise noted Table 1. Parameter BOARD SUPPLY (Not Connected Directly to Device) Maximum Voltage Range Typical Operating Voltage Range V PIN—SHUNT REGULATOR IN Operating Supply Voltage Range Quiescent Supply Current Maximum Shunt Supply Voltage ...
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... Min Typ Max 1.9 2 2.1 36 DRAIN(MAX 0.2 0 1.35 1.45 1. 1.35 1.45 1. 0.2 0 Rev Page ADM1073 Unit Test Conditions 3. DRAIN µ 3. DRAIN 2.5 mA PWRGD 0.5 mA PWRGD µ µs µA µs V µ 2.5 mA LATCHED ...
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... ADM1073 ABSOLUTE MAXIMUM RATINGS All voltages referred 25°C, unless otherwise noted Table 2. Parameter Supply Voltage (V − Maximum Shunt Supply Voltage SENSE Pin GATE Pin UV Pin OV Pin SS Pin TIMER Pin DRAIN Pin SHDN Pin SPLYGD Pin LATCHED Pin ...
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... SHDN Input Pin. Level-triggered device shutdown and reset. RESTART SHDN TIMER PWRGD ADM1073 TOP VIEW (Not to Scale) SENSE DRAIN GATE LATCHED SPLYGD 7 8 Figure 2. Pin Configuration is recommended on the V pin Rev Page ADM1073 ...
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... ADM1073 TYPICAL PERFORMANCE CHARACTERISTICS 500 450 400 350 300 250 200 150 100 50 0 –50 –35 –20 – TEMPERATURE (°C) Figure 3. I vs. Temperature IN 100.0 10.0 1 –40° +25° +85°C A 0.1 1.5 3.5 5.5 7.5 9.5 0.5 2.5 4.5 6.5 8.5 V (V) IN Figure ...
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... GATE –50 –35 –20 – TEMPERATURE (°C) Figure 13. I (FCL, Sink) vs. Temperature (V GATE 100 (V) GATE Figure 14. I (FCL, Sink) vs. V GATE GATE ADM1073 11.5 12 GATE ...
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... ADM1073 1000 980 960 940 920 900 880 860 840 820 800 –50 –35 –20 – TEMPERATURE (°C) Figure 15. UV Threshold vs. Temperature 2.00 1.98 1.96 1.94 1.92 1.90 1.88 1.86 1.84 1.82 1.80 –50 –35 –20 – TEMPERATURE (°C) Figure 16. OV Threshold vs. Temperature 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 –50 –35 –20 – TEMPERATURE (°C) Figure 17 ...
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... TEMPERATURE (°C) Figure 25. Current Limit PWM vs. Temperature (M) TIMER Figure 26. Current Limit PWM vs. R TIMER ADM1073 100.0nF 80 90 100 ...
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... ADM1073 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 –50 –35 –20 – TEMPERATURE (°C) Figure 27. Continuous Short Circuit Time before Shutdown vs. Temperature –50 –35 –20 – TEMPERATURE (°C) Figure 28. RESTART Time vs. Temperature Rev Page 5.0 4.5 4.0 6.8nF 3.5 3.0 4.7nF 2 ...
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... These transient currents can cause glitches on the system power supply and can permanently damage the board connectors and components. The ADM1073 is designed to control the manner in which a board’s supply voltage is applied so that harmful transient currents do not occur and the board can be safely inserted or removed from a live backplane ...
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... Voltage Step during Normal Operation Once the load capacitance is charged at initial board insertion and a PWRGD signal is issued by the ADM1073, the load begins to demand current. Therefore, following a step increase in the magnitude of the supply voltage, not all the FET current is available for charging of the load capacitance ...
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... SENSE pin tries to go above 100 mV, the GATE pin is controlled in a feedback loop to ensure that the voltage across the sense resistor is regulated at exactly 100 mV. SENSE RESISTOR The ADM1073’s current limiting function can operate at different current levels. The current limit is determined by selection of the sense resistor Table 4 shows how the ...
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... OV pins, which are proportional to the supply voltage. By choosing these ratios carefully, the user can program the ADM1073 to apply the supply voltage to the load only when it is within specific thresholds. Note that 1% tolerance resistors should always be used to maintain the accuracy of the pro- grammed thresholds ...
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... If the voltage goes out of range (below 0.868 above 1.93V on OV), GATE is pulled low. If the supply subsequently reenters the operating voltage window, the ADM1073 restores the GATE drive. Hysteresis must be considered when reentering the operating window, that is, V must increase above UV 0 ...
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... FUNCTIONALITY AND TIMING LIVE INSERTION The timing waveforms associated with the live insertion of a plug-in board using the ADM1073 are shown in Figure 36. The long connector pins are the first to make connection, and the GND − V potential climbs this voltage is applied, ...
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... Figure 39. Timing Waveforms Associated with an Undervoltage Fault (Ch1 = GATE; Ch2 = UV; Ch3 = PWRGD ; Ch4 = SPLYGD ) SOFT START The ADM1073 offers a variable soft start feature. The value of the capacitor on the SS pin sets the ramp rate of the inrush current profile at startup. Figure 40 to Figure 42 show different inrush current ramp rates for three SS capacitors ...
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... Figure 44 shows the behavior of ADM1073 when a temporary current fault occurs followed by a permanent current fault. When the first overcurrent fault occurs, the first 97.5 mV spike on the SENSE line can be seen. The ADM1073 retries a number of times, and during the fifth t time this current fault corrects OFF itself ...
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... Data Sheet LOGIC INPUTS Figure 46 shows assertion of the level-triggered SHDN signal for 150 ms, causing the ADM1073 to shut down for this duration. Figure 46. Timing Waveforms Associated with a RESET Event (Ch1 = GATE; Ch2 = SHDN ; Ch3 = PWRGD ; Ch4 = SPLYGD ) Figure 47 shows the assertion of the edge-triggered RESTART signal, causing the ADM1073 to shut down for approximately five seconds before restarting automatically ...
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... ADM1073 OUTLINE DIMENSIONS 4.50 4.40 4.30 PIN 1 1.05 1.00 0.80 0.15 0.05 COPLANARITY 0.10 ORDERING GUIDE Model 1 Temperature Range ADM1073ARUZ −40°C to +85°C ADM1073ARUZ-REEL −40°C to +85°C ADM1073ARUZ-REEL7 −40°C to +85°C EVAL-ADM1073MEBZ RoHS Compliant Part. 5.10 5.00 4. 6.40 BSC 1 7 0.65 BSC 1.20 0.20 MAX 0.09 8° SEATING 0° 0.30 PLANE 0.19 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 49 ...
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... Data Sheet NOTES Rev Page ADM1073 ...
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... ADM1073 NOTES ©2004–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04488–0–2/12(A) Rev Page Data Sheet ...