ADM1066 Analog Devices, ADM1066 Datasheet - Page 9

• Manufacturer Part Number: ADM1066
• Manufacturer: Analog Devices

Specifications of ADM1066

• # Supplies Monitored: 12
• Volt Monitoring Accuracy: 1%
• # Output Drivers: 10
• Fet Drive/enable Output: Both
• Voltage Readback: 12-bit ADC
• Supply Adj/margining: 12-bit ADC+6 DACs
• Package: 40 ld LFCSP ,48 ld TQFP

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
LFCSP
1 to 5
6 to 9
10
11
12
13
14
15 to 20
21 to 30
31
32
33
34
35
36
NOTES
1. NC = NO CONNECT.
2. THE LFCSP HAS AN EXPOSED PAD ON THE BOTTOM.
VX1
VX2
VX3
VX4
VX5
VP1
VP2
VP3
VP4
VH
1
Pin No.
PAD SHOULD BE SOLDERED TO THE BOARD FOR
THIS PAD IS A NO CONNECT (NC). IF POSSIBLE, THIS
IMPROVED MECHANICAL STABILITY.
10
1
2
3
4
5
6
7
8
9
TQFP
1, 12, 13,
24, 25, 36,
37, 48
2 to 6
7 to 10
11
14
15
16
17
18 to 23
26 to 35
38
39
40
41
42
43
40
11
PIN 1
INDICATOR
Figure 3. LFCSP Pin Configuration
39
12
38
13
37
14
(Not to Scale)
ADM1066
Mnemonic
NC
VX1 to VX5 (VXx)
VP1 to VP4 (VPx)
VH
AGND
REFGND
REFIN
REFOUT
DAC1 to DAC6
PDO10 to PDO1
PDOGND
VCCP
A0
A1
SCL
SDA
TOP VIEW
36
15
35
16
2
34
17
2
2
33
18
32
19
31
20
Description
No Connection.
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to
1.375 V. Alternatively, these pins can be used as general-purpose digital inputs.
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the
input attenuation on a potential divider connected to these pins, the output of which connects
to a supply fault detector. These pins allow thresholds from 2.5 V to 6.0 V, from 1.25 V to 3.00 V,
and from 0.573 V to 1.375 V.
High Voltage Input to Supply Fault Detectors. Two input ranges can be set by altering the input
attenuation on a potential divider connected to this pin, the output of which connects to a
supply fault detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.
Ground Return for Input Attenuators.
Ground Return for On-Chip Reference Circuits.
Reference Input for ADC. Nominally, 2.048 V. This pin must be driven by a reference voltage.
The on-board reference can be used by connecting the REFOUT pin to the REFIN pin.
Reference Output, 2.048 V. Typically connected to REFIN. Note that the capacitor must be
connected between this pin and REFGND. A 10 μF capacitor is recommended for this purpose.
Voltage Output DACs. These pins default to high impedance at power-up.
Programmable Driver Outputs.
Ground Return for Driver Outputs.
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this
pin and GND. A 10 μF capacitor is recommended for this purpose.
Logic Input. This pin sets the seventh bit of the SMBus interface address.
Logic Input. This pin sets the sixth bit of the SMBus interface address.
SMBus Clock Pin. Bidirectional, open-drain pin that requires external resistive pull-up.
SMBus Data Pin. Bidirectional, open-drain pin that requires external resistive pull-up.
30
29
28
27
26
25
24
23
22
21
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PDO9
PDO10
Rev. E | Page 9 of 32
VX1
VX2
VX3
VX4
VX5
VP1
VP2
VP3
VP4
NC = NO CONNECT
NC
NC
VH
10
11
12
1
2
3
4
5
6
7
8
9
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
INDICATOR
Figure 4. TQFP Pin Configuration
(Not to Scale)
ADM1066
TOP VIEW
36
35
34
33
32
31
30
29
28
27
26
25
ADM1066
NC
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PDO9
PDO10
NC